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| 型号： | ISP1181ABS,551 |
| 厂商： | ST-ERICSSON |
| 元件分类： | 总线控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PQCC48 |
| 封装： | 7 X 7 MM, 0.85 MM HEIGHT, PLASTIC, MO-220, SOT-619-2, HVQFN-48 |
| 文件页数： | 6/70页 |
| 文件大小： | 341K |
| 代理商： | ISP1181ABS,551 |
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Philips Semiconductors
ISP1181A
Full-speed USB peripheral controller
Product data
Rev. 05 — 08 December 2004
14 of 70
9397 750 13959
Koninklijke Philips Electronics N.V. 2004. All rights reserved.
9.3 Endpoint initialization
In response to the standard USB request, Set Interface, the rmware must program
all 16 ECRs of the ISP1181A in sequence (see Table 4), whether the endpoints are
enabled or not. The hardware will then automatically allocate FIFO storage space.
If all endpoints have been congured successfully, the rmware must return an empty
packet to the control IN endpoint to acknowledge success to the host. If there are
errors in the endpoint conguration, the rmware must stall the control IN endpoint.
When reset by hardware or via the USB bus, the ISP1181A disables all endpoints
and clears all ECRs, except for the control endpoint which is xed and always
enabled.
Endpoint initialization can be done at any time; however, it is valid only after
enumeration.
9.4 Endpoint I/O mode access
When an endpoint event occurs (a packet is transmitted or received), the associated
endpoint interrupt bits (EPn) of the Interrupt Register (IR) will be set by the SIE. The
rmware then responds to the interrupt and selects the endpoint for processing.
The endpoint interrupt bit will be cleared by reading the Endpoint Status Register
(ESR). The ESR also contains information on the status of the endpoint buffer.
For an OUT (= receive) endpoint, the packet length and packet data can be read from
ISP1181A using the Read Buffer command. When the whole packet has been read,
the rmware sends a Clear Buffer command to enable the reception of new packets.
For an IN (= transmit) endpoint, the packet length and data to be sent can be written
to ISP1181A using the Write Buffer command. When the whole packet has been
written to the buffer, the rmware sends a Validate Buffer command to enable data
transmission to the host.
9.5 Special actions on control endpoints
Control endpoints require special rmware actions. The arrival of a SETUP packet
ushes the IN buffer and disables the Validate Buffer and Clear Buffer commands for
the control IN and OUT endpoints. The microcontroller needs to re-enable these
commands by sending an Acknowledge Setup command to both control endpoints.
This ensures that the last SETUP packet stays in the buffer and that no packets can
be sent back to the host until the microcontroller has explicitly acknowledged that it
has seen the SETUP packet.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ISP1181ABSGE | 功能描述:IC USB CNTRLR FULL-SPD 48-HVQFN RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1181ABS-S | 功能描述:IC USB HOST CTRL FULL-SPD 48HVQF RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1181ABS-T | 功能描述:USB 接口集成电路 USB 1.1 ADV DEVICE RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
| ISP1181ABSUM | 功能描述:IC USB HOST CTRL FULL-SPD 48HVQF RoHS:是 类别:集成电路 (IC) >> 接口 - 控制器 系列:- 标准包装:4,900 系列:- 控制器类型:USB 2.0 控制器 接口:串行 电源电压:3 V ~ 3.6 V 电流 - 电源:135mA 工作温度:0°C ~ 70°C 安装类型:表面贴装 封装/外壳:36-VFQFN 裸露焊盘 供应商设备封装:36-QFN（6x6） 包装:* 其它名称:Q6396337A |
| ISP1181ADGG | 功能描述:USB 接口集成电路 USB CNTRLR FULL-SPD RoHS:否 制造商:Cypress Semiconductor 产品:USB 2.0 数据速率: 接口类型:SPI 工作电源电压:3.15 V to 3.45 V 工作电源电流: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:WLCSP-20 |
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