参数资料
型号: ISPPAC-CLK5320S-01T64I
厂商: Lattice Semiconductor Corporation
文件页数: 52/56页
文件大小: 0K
描述: IC BUFFER FANOUT ISP UNIV 64TQFP
标准包装: 160
系列: ispClock™
类型: 时钟发生器,扇出配送,零延迟缓冲器
PLL: 带旁路
输入: HSTL,LVCMOS,LVDS,LVPECL,LVTTL,SSTL
输出: eHSTL,HSTL,LVCMOS,LVTTL,SSTL
电路数: 1
比率 - 输入:输出: 2:20
差分 - 输入:输出: 是/无
频率 - 最大: 267MHz
除法器/乘法器: 是/无
电源电压: 3 V ~ 3.6 V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 64-LQFP
供应商设备封装: 64-TQFP(10x10)
包装: 托盘
Lattice Semiconductor
ispClock5300S Family Data Sheet
56
Technical Support Assistance
Hotline:
1-800-LATTICE (North America)
+1-408-826-6002 (Outside North America)
e-mail:
isppacs@latticesemi.com
Internet: www.latticesemi.com
Revision History
Date
Version
Change Summary
April 2006
01.0
Initial release.
May 2006
01.1
Performance Characteristics-PLL table - Correction to min. output frequency, fOUT in Fine
Skew Mode. Min frequency = 5MHz.
Programmable Skew table - Correction to number of skew steps (from 16 to 8).
Programmable Skew table - Correction to Skew control range.
Output V Dividers section - Added explanation to V-divider settings as Power of 2 Settings
(1, 2, 4, 8, 16, 32).
June 2006
01.2
Added Reset Signal Slew Rate specication to Control Functions table.
Modied pin descriptions in Pin Descriptions table to reect changes to pin 48 from NC to
GNDD.
Modied package diagrams to reect the pin 48 changes from NC to GNDD.
Modied RESET pin description to include pull-up resistor when not driven.
October 2006
01.3
Included references to ispClock5316S and ispClock5320S devices.
Added typical performance graphs.
October 2007
01.4
Updated Boundary Scan Register information in ispClock5300S TAP Registers diagram.
Added support for the Internal Feedback mode of operation.
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ISPPACCLK5320S-01T64I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended
ISPPACCLK5320S-01TN48C 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended
ISPPACCLK5320S-01TN48I 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended
ispPAC-CLK5320S-01TN64C 功能描述:时钟驱动器及分配 ISP 0 Delay Unv Fan- Out Buf-Sngl End RoHS:否 制造商:Micrel 乘法/除法因子:1:4 输出类型:Differential 最大输出频率:4.2 GHz 电源电压-最大: 电源电压-最小:5 V 最大工作温度:+ 85 C 封装 / 箱体:SOIC-8 封装:Reel
ISPPACCLK5320S-01TN64C 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:In-System Programmable, Zero-Delay, Universal Fan-Out Buffer, Single-Ended