参数资料
型号: L64781
厂商: LSI CORP
元件分类: 消费家电
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP100
封装: PLASTIC, QFP-100
文件页数: 57/164页
文件大小: 2003K
代理商: L64781
Using the L64781 Chip in a Receiver
1-3
build a system because the clock and frequency loops, as well as the
DVB-T/DVB-S-compliant concatenated FEC decoder, are incorporated
into the device. The L64781/L64118 chip combination forms the core of
a receiver designed for DVB-T.
Figure 1.1
Receiver Architecture
Figure 1.1 shows the basic structure of a terrestrial receiver. The UHF
(or, possibly, VHF) signal from the antenna passes through a tuner
module that delivers a low intermediate-frequency (IF) signal to the
L64781 chip. The L64781 chip performs all the essential functions for
COFDM demodulation, including the nal steps of error correction. It
requires a sampling-frequency free-crystal oscillator slightly greater than
18.29 MHz1 for the digital clock loop. The L64781 delivers soft-decision
information to the concatenated FEC block, which then completes the
error correction process, delivering an MPEG-2 transport stream. Other
MPEG-standard LSI Logic chips (for example, the L64118 and the
L64x05) can then:
Demultiplex the MPEG-2 transport stream into its coded audio,
coded video, and data components
Deal with conditional access
XO
Tuner
L64781
AFC
AGC
MPEG
TS Demux
System CPU
L64118
AGC = Automatic Gain Control
AFC = Automatic Frequency Control
MPEG
A/V Decoder
L64x05
1. More precisely, 128/7 MHz; that is: 18.28571428.... MHz (+ a few ppm in digital-loop mode).
l64781.book Page 3 Friday, January 19, 2001 1:28 PM
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