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| 型号： | LC4032ZE-7TN48I |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | EE PLD, 7.5 ns, PQFP48 |
| 封装： | LEAD FREE, TQFP-48 |
| 文件页数： | 10/60页 |
| 文件大小： | 1381K |
| 代理商： | LC4032ZE-7TN48I |
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Lattice Semiconductor
ispMACH 4000ZE Family Data Sheet
18
Absolute Maximum Ratings
1, 2, 3
Supply Voltage (VCC) . . . . . . . . . . . . . . . . . . . . . . -0.5 to 2.5V
Output Supply Voltage (VCCO) . . . . . . . . . . . . . . . -0.5 to 4.5V
Input or I/O Tristate Voltage Applied
4, 5 . . . . . . . . . -0.5 to 5.5V
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . -65 to 150°C
Junction Temperature (Tj) with Power Applied . . . -55 to 150°C
1. Stress above those listed under the “Absolute Maximum Ratings” may cause permanent damage to the device. Functional
operation of the device at these or any other conditions above those indicated in the operational sections of this specication
is not implied.
2. Compliance with Lattice Thermal Management document is required.
3. All voltages referenced to GND.
4. Undershoot of -2V and overshoot of (VIH (MAX) + 2V), up to a total pin voltage of 6V is permitted for a duration of <20ns.
5. Maximum of 64 I/Os per device with VIN > 3.6V is allowed.
Recommended Operating Conditions
Erase Reprogram Specications
Hot Socketing Characteristics
1,2,3
Symbol
Parameter
Min.
Max.
Units
VCC
Supply Voltage
Standard Voltage Operation
1.7
1.9
V
Extended Voltage Operation
1.6
1
1.9
V
Tj
Junction Temperature (Commercial)
0
90
°C
Junction Temperature (Industrial)
-40
105
°C
1. Devices operating at 1.6V can expect performance degradation up to 35%.
Parameter
Min.
Max.
Units
Erase/Reprogram Cycle
1,000
—
Cycles
Note: Valid over commercial temperature range.
Symbol
Parameter
Condition
Min.
Typ.
Max.
Units
IDK
Input or I/O Leakage Current
0
≤ VIN ≤ 3.0V, Tj = 105°C
—
±30
±150
A
0
≤ VIN ≤ 3.0V, Tj = 130°C
—
±30
±200
A
1. Insensitive to sequence of VCC or VCCO. However, assumes monotonic rise/fall rates for VCC and VCCO, provided (VIN - VCCO) ≤ 3.6V.
2. 0 < VCC < VCC (MAX), 0 < VCCO < VCCO (MAX).
3. IDK is additive to IPU, IPD or IBH. Device defaults to pull-up until fuse circuitry is active.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC4032ZE7TN48IES | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE-7TN48IES | 功能描述:CPLD - 复杂可编程逻辑器件 36 I/O 1.8V 7.5ns Ultra Low Power RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC4032ZE7TN64C | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE7TN64CES | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE7TN64I | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
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