参数资料
型号: LC4032ZE-7TN48I
厂商: LATTICE SEMICONDUCTOR CORP
元件分类: PLD
中文描述: EE PLD, 7.5 ns, PQFP48
封装: LEAD FREE, TQFP-48
文件页数: 5/60页
文件大小: 1381K
代理商: LC4032ZE-7TN48I
Lattice Semiconductor
ispMACH 4000ZE Family Data Sheet
13
The block-level OE PT of each GLB is also tied to Block Input Enable (BIE) of that block. Hence, for a 256-macro-
cell device (with 16 blocks), each block's BIE signal is driven by block-level OE PT from each block.
Figure 11. Global OE Generation for All Devices Except ispMACH 4032ZE
Figure 12. Global OE Generation for ispMACH 4032ZE
On-Chip Oscillator and Timer
An internal oscillator is provided for use in miscellaneous housekeeping functions such as watchdog heartbeats,
digital de-glitch circuits and control state machines. The oscillator is disabled by default to save power. Figure 13
shows the block diagram of the oscillator and timer block.
Shared PTOE
(Block 0)
Shared PTOE
(Block n)
BIE0
BIEn
Global
Fuses
GOE (0:3)
to I/O cells
Internal Global OE
PT Bus
(4 lines)
4-Bit
Global OE Bus
Global OE
Fuse connection
Hard wired
Shared PTOE
(Block 0)
Shared PTOE
(Block 1)
Global
Fuses
GOE (3:0)
to I/O cells
Internal Global OE
PT Bus
(2 lines)
4-Bit
Global OE Bus
Global OE
Fuse connection
Hard wired
BIE0
BIE1
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