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| 型号： | LC4032ZE-7TN48I |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 中文描述： | EE PLD, 7.5 ns, PQFP48 |
| 封装： | LEAD FREE, TQFP-48 |
| 文件页数： | 4/60页 |
| 文件大小： | 1381K |
| 代理商： | LC4032ZE-7TN48I |
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Lattice Semiconductor
ispMACH 4000ZE Family Data Sheet
12
The number of BIE inputs, thus the number of Power Guard “Blocks” that can exist in a device, depends on the
device size. Table 8 shows the number of BIE signals available in the ispMACH 4000ZE family. The number of I/Os
available in each block is shown in the Ordering Information section of this data sheet.
Table 8. Number of BIE Signals Available in ispMACH 4000ZE Devices
Power Guard for Dedicated Inputs
Power Guard can optionally be applied to the dedicated inputs. The dedicated inputs and clocks are controlled by
Table 10. Dedicated Inputs to BIE Association
For more information on the Power Guard function refer to TN1174, Advanced Features of the ispMACH 4000ZE
Global OE (GOE) and Block Input Enable (BIE) Generation
Most ispMACH 4000ZE family devices have a 4-bit wide Global OE (GOE) Bus (Figure 11), except the ispMACH
4032 device that has a 2-bit wide Global OE Bus (Figure 12). This bus is derived from a 4-bit internal global OE
(GOE) PT bus and two dual purpose I/O or GOE pins. Each signal that drives the bus can optionally be inverted.
Each GLB has a block-level OE PT that connects to all bits of the Global OE PT bus with four fuses. Hence, for a
256-macrocell device (with 16 blocks), each line of the bus is driven from 16 OE product terms. Figures 9 and 10
show a graphical representation of the global OE generation.
Device
Number of Logic Blocks, Power
Guard Blocks and BIE Signals
ispMACH 4032ZE
Two (Blocks: A and B)
ispMACH 4064ZE
Four (Blocks: A, B, C and D)
ispMACH 4128ZE
Eight (Blocks: A, B, C, …, H)
ispMACH 4256ZE
Sixteen (Blocks: A, B, C, …, P)
Table 9. Dedicated Clock Inputs to BIE Association
CLK/I
32 MC Block
64MC Block
128MC Block
256MC Block
CLK0 / I
AAAA
CLK1 / I
A
B
D
H
CLK2 / I
B
C
E
I
CLK3 / I
B
D
H
P
Dedicated Input
4064ZE Block
4128ZE Block
4256ZE Block
0A
B
D
1
BCE
2B
D
G
3C
F
G
4D
GJ
5D
HL
6—
—
M
7—
—
O
8—
—
O
9—
—
B
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LC4032ZE7TN48IES | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE-7TN48IES | 功能描述:CPLD - 复杂可编程逻辑器件 36 I/O 1.8V 7.5ns Ultra Low Power RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| LC4032ZE7TN64C | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE7TN64CES | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
| LC4032ZE7TN64I | 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:1.8V In-System Programmable Ultra Low Power PLDs |
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