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参数资料
| 型号： | M25PE40VMW6G |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.208 INCH, ROHS COMPLIANT, PLASTIC, SOP-8 |
| 文件页数： | 25/62页 |
| 文件大小： | 565K |
| 代理商： | M25PE40VMW6G |
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M25PE40
Instructions
31/62
6.9
Page Write (PW)
The Page Write (PW) instruction allows bytes to be written in the memory. Before it can be
accepted, a Write Enable (WREN) instruction must previously have been executed. After the
Write Enable (WREN) instruction has been decoded, the device sets the Write Enable Latch
(WEL).
The Page Write (PW) instruction is entered by driving Chip Select (S) Low, followed by the
instruction code, three address bytes and at least one data byte on Serial Data input (D).
The rest of the page remains unchanged if no power failure occurs during this write cycle.
The Page Write (PW) instruction performs a page erase cycle even if only one byte is
updated.
If the 8 least significant address bits (A7-A0) are not all zero, all transmitted data exceeding
the addressed page boundary roll over, and are written from the start address of the same
page (the one whose 8 least significant address bits (A7-A0) are all zero). Chip Select (S)
must be driven Low for the entire duration of the sequence.
The instruction sequence is shown in Figure 15.
If more than 256 bytes are sent to the device, previously latched data are discarded and the
last 256 data bytes are guaranteed to be written correctly within the same page. If less than
256 Data bytes are sent to device, they are correctly written at the requested addresses
without having any effects on the other bytes of the same page.
For optimized timings, it is recommended to use the Page Write (PW) instruction to write all
consecutive targeted bytes in a single sequence versus using several Page Write (PW)
sequences with each containing only a few bytes (see Table 21: AC characteristics (50 MHz
Chip Select (S) must be driven High after the eighth bit of the last data byte has been
latched in, otherwise the Page Write (PW) instruction is not executed.
As soon as Chip Select (S) is driven High, the self-timed Page Write cycle (whose duration
is tPW) is initiated. While the Page Write cycle is in progress, the Status Register may be
read to check the value of the Write In Progress (WIP) bit. The Write In Progress (WIP) bit is
1 during the self-timed Page Write cycle, and is 0 when it is completed. At some unspecified
time before the cycle is complete, the Write Enable Latch (WEL) bit is reset.
A Page Write (PW) instruction applied to a page that is hardware protected is not executed.
Any Page Write (PW) instruction, while an Erase, Program or Write cycle is in progress, is
rejected without having any effects on the cycle that is in progress.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M25PE40-VMW6G | 功能描述:闪存 4 Mbit Lo Vltg Page Erasable Seral 闪存 RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M25PE40-VMW6G_NUD | 制造商:Micron Technology Inc 功能描述: |
| M25PE40VMW6P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout |
| M25PE40-VMW6P | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE40VMW6TG | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout |
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