- 您现在的位置：买卖IC网 > PDF目录180109 > M25PE40VMW6G (STMICROELECTRONICS) 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 PDF资料下载
参数资料
| 型号： | M25PE40VMW6G |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | PROM |
| 英文描述： | 512K X 8 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 0.208 INCH, ROHS COMPLIANT, PLASTIC, SOP-8 |
| 文件页数： | 29/62页 |
| 文件大小： | 565K |
| 代理商： | M25PE40VMW6G |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页
M25PE40
Instructions
35/62
6.11
Write to Lock Register (WRLR)
Note:
The Write to Lock Register (WRLR) instruction is decoded only in the M25PE40 in the T9HX
process (see Important note on page 6).
The Write to Lock Register (WRLR) instruction allows bits to be changed in the Lock
Registers. Before it can be accepted, a Write Enable (WREN) instruction must previously
have been executed. After the Write Enable (WREN) instruction has been decoded, the
device sets the Write Enable Latch (WEL).
The Write to Lock Register (WRLR) instruction is entered by driving Chip Select (S) Low,
followed by the instruction code, three address bytes (pointing to any address in the targeted
sector and one data byte on Serial Data input (D). The instruction sequence is shown in
Figure 17. Chip Select (S) must be driven High after the eighth bit of the data byte has been
latched in, otherwise the Write to Lock Register (WRLR) instruction is not executed.
Lock Register bits are volatile, and therefore do not require time to be written. When the
Write to Lock Register (WRLR) instruction has been successfully executed, the Write
Enable Latch (WEL) bit is reset after a delay time less than tSHSL minimum value.
Any Write to Lock Register (WRLR) instruction, while an Erase, Program or Write cycle is in
progress, is rejected without having any effects on the cycle that is in progress.
Figure 17.
Write to Lock Register (WRLR) instruction sequence
Table 10.
Lock Register in(1)
1.
The table rows in gray are true for products processed in the T7X process only (see Important note on
Sector
Bit
Value
All sectors
b7-b2
‘0’
b1
Sector Lock Down bit value
b0
Sector Write Lock bit value
AI10784b
C
D
S
23
2
1
3456789 10
28 29 30 31 32 33 34 35
22 21
3210
36 37 38
Instruction
24-bit address
0
765432
0
1
Lock Register
value
39
MSB
相关PDF资料 |
PDF描述 |
|---|---|
| M27C1024-10F1X | 1 Mbit 64Kb x16 UV EPROM and OTP EPROM |
| M27C1024-10F3TR | 1 Mbit 64Kb x16 UV EPROM and OTP EPROM |
| M27C1024-10F3X | 1 Mbit 64Kb x16 UV EPROM and OTP EPROM |
| M27C1024-10F6TR | 1 Mbit 64Kb x16 UV EPROM and OTP EPROM |
| M27C1024-10F6X | 1 Mbit 64Kb x16 UV EPROM and OTP EPROM |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M25PE40-VMW6G | 功能描述:闪存 4 Mbit Lo Vltg Page Erasable Seral 闪存 RoHS:否 制造商:ON Semiconductor 数据总线宽度:1 bit 存储类型:Flash 存储容量:2 MB 结构:256 K x 8 定时类型: 接口类型:SPI 访问时间: 电源电压-最大:3.6 V 电源电压-最小:2.3 V 最大工作电流:15 mA 工作温度:- 40 C to + 85 C 安装风格:SMD/SMT 封装 / 箱体: 封装:Reel |
| M25PE40-VMW6G_NUD | 制造商:Micron Technology Inc 功能描述: |
| M25PE40VMW6P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout |
| M25PE40-VMW6P | 制造商:NUMONYX 制造商全称:Numonyx B.V 功能描述:4 Mbit, page-erasable serial Flash memory with byte alterability, 75 MHz SPI bus, standard pinout |
| M25PE40VMW6TG | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:4 Mbit, low voltage, Page-Erasable Serial Flash memory with byte alterability, 50 MHz SPI bus, standard pinout |
发布紧急采购，3分钟左右您将得到回复。