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参数资料
| 型号： | M295V100-T70XM3R |
| 厂商： | 意法半导体 |
| 元件分类： | FLASH |
| 英文描述： | 1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
| 中文描述： | 1兆位的128KBx8或64Kbx16，有启动区域的单电源闪存 |
| 文件页数： | 13/30页 |
| 文件大小： | 207K |
| 代理商： | M295V100-T70XM3R |
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Symbol
Parameter
Test Condition
Min
Max
Unit
I
LI
Input Leakage Current
0V
≤
V
IN
≤
V
CC
±
1
μ
A
I
LO
Output Leakage Current
0V
≤
V
OUT
≤
V
CC
±
1
μ
A
I
CC1
Supply Current (Read) TTLByte
E = V
IL
, G = V
IH
, f = 6MHz
20
mA
I
CC1
Supply Current (Read) TTLWord
E = V
IL
, G = V
IH
, f = 6MHz
20
mA
I
CC2
Supply Current (Standby) TTL
E = V
IH
1
mA
I
CC3
Supply Current (Standby) CMOS
E = V
CC
±
0.2V
100
μ
A
I
CC4(1)
Supply Current (Program or Erase)
Byte program, Block or
Chip Erase in progress
20
mA
V
IL
Input Low Voltage
–0.5
0.8
V
V
IH
Input High Voltage
2
V
CC
+ 0.5
V
V
OL
Output Low Voltage
I
OL
= 5.8mA
0.45
V
V
OH
Output High VoltageTTL
I
OH
= –2.5mA
2.4
V
Output High Voltage CMOS
I
OH
= –100
μ
A
V
CC
–0.4V
V
V
ID
A9 Voltage (Electronic Signature)
11.0
12.0
V
I
ID
A9 Current (Electronic Signature)
A9 = V
ID
100
μ
A
V
LKO
Supply Voltage(Erase and
Program lock-out)
3.2
4.2
V
Note:
1. Sampled only,not 100% tested.
Table13. DC Characteristics
(T
A
= 0 to 70
°
C, –40 to 85
°
C or–40 to 125
°
C; V
CC
= 5V
±
10%)
Duringtheexecutionof theerasebytheP/E.C.,the
memory accepts onlythe EraseSuspend ES and
Read/Reset RD instructions. Data Polling bit DQ7
returns ’0’ while the erasureis in progress and’1’
when it has completed. The Toggle bit DQ2 and
DQ6 toggle during the erase operation. They stop
when erase is completed. After completion the
StatusRegisterbitDQ5returns’1’iftherehasbeen
an erase failure. In sucha situation,the Togglebit
DQ2 can be used to determine which block is not
correctly erased. In the case of erase failure, a
Read/ResetRDinstructionis necessaryinorderto
reset the P/E.C.
ChipErase(CE)Instruction.
Thisinstructionuses
six write cycles. The Erase Set-up command 80h
is written to address AAAAh in the Byte-widecon-
figuration or the address 5555h in the Word-wide
configurationon thethirdcycleafterthetwoCoded
cycles. The Chip Erase Confirm command 10h is
similarly writtenon thesixthcycleafter anothertwo
Codedcycles.If thesecondcommandgiven is not
an eraseconfirm or if the Codedcyclesarewrong,
the instruction aborts and the device is reset to
ReadArray.Itisnotnecessaryto programthearray
with00h firstas theP/E.C.will automaticallydothis
beforeerasingit to FFh. Readoperationsafter the
sixth rising edge of W or E output the Status
Registerbits. Duringthe executionof the eraseby
theP/E.C.,Data PollingbitDQ7returns’0’, then’1’
on completion. The Toggle bits DQ2 and DQ6
toggleduringeraseoperationandstopwhenerase
is completed.After completionthe StatusRegister
bit DQ5 returns ’1’ if there has been an Erase
Failure.
13/30
M29F100T, M29F100B
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相关代理商/技术参数 |
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| M295V100-T70XM3TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
| M295V100-T70XM6R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
| M295V100-T70XM6TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
| M295V100-T70XN1R | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
| M295V100-T70XN1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:1 Mbit 128Kb x8 or 64Kb x16, Boot Block Single Supply Flash Memory |
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