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参数资料
| 型号： | MB86832-66PFV-G |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 32-BIT, 66 MHz, RISC PROCESSOR, PQFP176 |
| 封装： | 24 X 24 MM, 0.50 MM PITCH, EIAJ, PLASTIC, SQFP-176 |
| 文件页数： | 11/54页 |
| 文件大小： | 269K |
| 代理商： | MB86832-66PFV-G |
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MB86832
Fujitsu Microelectronics, Inc.
19
Request Sense Register (Read only)
31
16
0
Reserved (no bits)
Request Sense 15-1
Bit 15-1
:REQSNS15-1 (initial value all 0)
Shows channel 15-1 interrupt requests. If 1, indicates that an interrupt request is pending.
Bit 0
:Reserved (0 during reads)
15
If events set byTrigger Mode Registers are detected, bits
corresponding the events are set in the Request Sense Register.
The Request Sense Register is read-only, and it is cleared by a reset. If
an IRQx signal may be high following reset (i.e. the default trigger
mode), its trigger mode should be programmed and any pending
interrupt request cleared before enabling the interrupt controller.
Figure 5.
Interrupt Controller Conguration
IRC Mode Register
Table 7. Interrupt Controller Modes
IRC
Trigger
Mode
Control
Request
Sense
IRQ
Mask
Priority
Encoder
IRL
Latch
Selector
IRL
Mask
IRQ7
IRQ6
:
IRQ1
IRLIN<3:0>/
IRQ15-12
IRLOUT<3:0>
To
unused inputs tied
low internally
CPU
IRQ11-8
31
16
2
1
0
Reserved (no bits)
Reserved (reads as zero)
Bit1, 0
: IRCMD (Read/Write). (Initial value 00). IRC Mode Bit.
15
IRCMD
IRCMD
IRC Mode
00
IRC disabled. IRL<3:0> inputs are selected.
01
IRC enabled. IRL<3:0> are replaced by IRQ<15:12>, and the
IRQ<11:8> inputs are available.
10
Reserved setting.
Do not use.
11
Reserved setting.
Do not use.
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相关代理商/技术参数 |
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| MB86832-80PFV | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller |
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| MB86833PMT2 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller |
| MB86834 | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller |
| MB86834-120PFV | 制造商:FUJITSU 制造商全称:Fujitsu Component Limited. 功能描述:32-bit Embedded Controller |
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