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参数资料
| 型号： | MB89PV950CF |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 5 MHz, MICROCONTROLLER, CQFP64 |
| 封装： | 0.80 MM PITCH, PIGGY BACK, MQFP-64 |
| 文件页数： | 101/110页 |
| 文件大小： | 619K |
| 代理商： | MB89PV950CF |
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OPERATION
3– 4
3.2
Reset
The detail of reset operation and reset sources are described below.
3.2.1 Reset Operation
When reset conditions occur, the MB89950 series of microcontrollers suspend the currently-executing
instruction to enter the reset state. The contents written at the RAM do not change before and after reset.
However, if a reset occurs during writing of 16-bit long data, data is written to the upper bytes and may not
be written to lower bytes. If a reset occurs around write timing, the contents of the addresses being written
are not assured.
When the reset conditions are cleared, the MB89950 series of microcontrollers are released from the reset
state and start operation after fetching the mode data from address FFFD
H, the upper bytes of the reset
vectors from address FFFE
H, and the lower bytes from address FFFFH, in that order. Fig. 3.2 shows the
flowchart for the reset operation.
Fig. 3.2 Outline of Reset Operation
Fig. 3.3 indicates the structure of data to be stored in addresses FFFD
H, FFFEH, and FFFFH.
Fig. 3.3 Reset Vector Structure
Reset clear
Executes the next instruction
Fetches reset vectors from addresses
FFFEH and FFFFH
Fetches instruction codes from reset
vectors and executes the instruction
Fetches mode data from address FFFDH
Lower 8 bits of reset vector
Upper 8 bits of reset vector
FFFFH
FFFEH
FFFDH
Enter the address where the instruction, which will be executed first
after reset is cleared, is stored.
Reserved; always set 0.
76543210
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