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参数资料
| 型号： | MB89PV950CF |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, 5 MHz, MICROCONTROLLER, CQFP64 |
| 封装： | 0.80 MM PITCH, PIGGY BACK, MQFP-64 |
| 文件页数： | 74/110页 |
| 文件大小： | 619K |
| 代理商： | MB89PV950CF |
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HARDWARE CONFIGURATION
2– 51
(3) Description of registers
The detail of each register is described below.
[Bit 7] SIOF: Serial I/O interrupt-request flag
This bit is used to indicate the serial I/O transfer state.
The meaning of each bit when reading is as follows:
Note that 1 is always read when the Read Modify Write instruction is read.
If this bit is set when an interrupt is enabled (SIOE = 1), an interrupt request
is output to the CPU.
The meaning of each bit when writing is as follows:
The end-of-transfer decision may be made by either the SST bit (bit 0) of
the SMR or by this bit.
[Bit 6] SIOE: Serial I/O interrupt-enable bit
This bit is used to enable a serial I/O interrupt request.
[Bit 5] SCKE: Shift-clock output-enable bit
This bit is used to control the shift-clock I/O pins.
When using the P45/SCK pin as an external clock, always set the DDR4
to input (bit 5 of DDR4 = 0).
This bit is valid when the RSEL bit of the SMC2 in the UART is 1.
Peripherals
(a) Serial-mode register (SMR)
The SMR is used to control serial I/O.
SMR
Address: 001CH
SDR
Address: 001DH
Address: 001CH
(Initial value)
00000000B
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
SIOF
SIOE
SCKE
SOE
CKS1
CKS0
BDS
SST
(R/W)
Serial data transfer not terminated
Serial data transfer terminated
0
1
Clears this bit
Unchanges this bit and other bits unaffected
0
1
Serial I/O interrupt-output disabled
Serial I/O interrupt-output enabled
0
1
General-purpose port pin (P45) or SCK input pin
SCK (shift clock) output pin
0
1
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