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参数资料
| 型号： | MC144144P |
| 厂商： | MOTOROLA INC |
| 元件分类： | 颜色信号转换 |
| 英文描述： | Digital Signal Processors 44-JLCC -55 to 125 |
| 中文描述： | COLOR SIGNAL DECODER, PDIP18 |
| 封装： | PLASTIC, DIP-18 |
| 文件页数： | 15/44页 |
| 文件大小： | 565K |
| 代理商： | MC144144P |
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MC144144
15
MOTOROLA
likely to be sent. Since 15 scan lines per row mode is being
used, rows 10 – 13 will appear at the bottom of the screen.
Row 1, Grn –
Network Name – Call Letters
Row 2, Ital, Und –
Program Name (title)
Row 3, Cyan –
Program Length – Program Type – Time
In Show
Row 10, Yel –
Program Description Row 1 (if sent)
Row 11, Yel –
Program Description Row 2 (if sent)
Row 12, Yel –
Program Description Row 3 (if sent)
Row 13, Yel –
Program Description Row 4 (if sent)
When an XDS display mode has been selected the in-
formation will be displayed as the appropriate packets are re-
ceived. The display will remain on–screen as long as valid
XDS data continues to be received. If the 16–second erase
timer is enabled (the default condition), the XDS display will
be erased when no valid XDS data has been received for
16 seconds. If subsequent XDS data is received with dis-
playable packets, that information will reappear on the
screen. XDS data recovery can be active in the XDS display
mode.
The XDS display mode is turned off by selecting a different
display mode.
DISPLAY ERASE AND AUTOBLANKING
The display is erased in the TEXT mode by the start text
command (but box is maintained) and in the CAPTION mode
by the erase displayed memory (EDM) command. The non–
displayed memory can be erased by the erase non–dis-
played memory (ENM) command.
Four other events can also cause the display to be erased.
First, changing the display mode, such as from CC1 to T1,
CC1 to XDSF, and so forth, will clear the memory and hence
the display. Second, a loss of video lock, such as on a chan-
nel change, will cause the screen to be cleared. The current-
ly active display mode will not be changed.
The third action that will clear the displayed memory is
when the autoblanking circuit is activated. The autoblanking
circuit monitors the presence of a Line 21 waveform in the
field corresponding to the data channel selected for display.
The decoder is held in the decoder OFF (TV) state until a
Line 21 waveform is continuously detected for a period of
0.5 s. Once the decision has been made, and assuming that
the user has selected the decoder ON state, the normal dis-
play for the data channel selected will be presented.
The autoblanking circuit will not be activated again until a
Line 21 waveform has been lost for 1.5 s. Any data received
during the 1.5 s period will reset the counter so that auto-
blanking will only be activated on continuous loss of the Line
21 waveform for 1.5 s.
The fourth method of clearing the screen is by the action of
the 16 s erase timer. This function is only active when a CAP-
TION or XDS display mode has been selected. If no data is
received for the display channel selected for a 16 s period,
the on–screen memory will be erased. The decoder will still
be in the selected channel with the decoder ON, so that
when data for the selected channels resumes, it will be dis-
played.
SERIAL COMMUNICATIONS INTERFACE
Commands and data are sent to and from the MC144144
through its serial communications interface. Two Serial Con-
trol Modes are available. One mode is a two–wire I2C bus in-
terface (Figure 6). The other serial mode is a three–wire
(Figure 7), synchronous serial peripheral interface (SPI). In
both cases the MC144144 acts as a slave device.
This port is the path for setting the configuration and op-
erational modes of the device. It is also the port for outputing
the recovered XDS data and for inputing the OSD data for
display.
Five pins are dedicated to the control port function and one
pin can be configured to provide an interrupt output. These
pins are designated as:
SCK = serial clock line in either serial mode.
SDA = serial data (bidirectional) line in I2C mode and data
in for SPI mode.
SDO = serial data out for SPI mode. Not used in I2C
mode.
SEN = SPI mode enable signal. Must be HIGH for I2C
mode.
SMS = serial mode select.
VIN/INTRO = Interrupt output on selected event when
used.
When the vertical lock = VIDEO, the VIN/INTRO pin is set
as an output, providing the INTRO signal. This interrupt op-
eration is available in either serial control mode.
The MC144144 will be able to interrupt on the occurrence
of any of several events. The master device will clear the in-
terrupt by writing to the interrupt request register.
I2C Bus Operation
The serial control mode (Figure 6) in use is selected by the
state of the SMS pin. When SMS is set LOW, the MC144144
will be in the I2C mode. In this mode, the MC144144 sup-
ports a bidirectional two–wire bus and data transmission pro-
tocol. The bus is controlled by the master device, which
generates the serial clock (SCK), controls the bus access,
and generates the start and stop conditions. The SDA pin is
the bidirectional data line. In this mode the SDO output is not
used and the pin will be in its high impedance state.
The MC144144 is a slave device having a slave address of
0010100. The MC144144 can receive or transmit data under
control of the master device.
When the SMS and SEN pins are both LOW, the part will
be in the RESET state. Therefore the SEN pin can be used to
reset the part while in the I2C mode. The SEN pin may be
tied to an NRESET signal or tied HIGH if no reset is desired.
The bus protocol requires:
Data transfer may only be started when the bus is not busy.
During data transfer, data transitions must not occur while
the clock is HIGH.
Bus conditions are defined as:
Not Busy
– data and clock lines both HIGH.
Start
– A HIGH to LOW transition of SDA line while SCK line
is HIGH.
Stop
– A LOW to HIGH transition of SDA line while SCK line
is HIGH.
Acknowledge
– When addressed, the receiving device must
output an acknowledge after the reception of each byte. The
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