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参数资料
| 型号： | MC144144P |
| 厂商： | MOTOROLA INC |
| 元件分类： | 颜色信号转换 |
| 英文描述： | Digital Signal Processors 44-JLCC -55 to 125 |
| 中文描述： | COLOR SIGNAL DECODER, PDIP18 |
| 封装： | PLASTIC, DIP-18 |
| 文件页数： | 18/44页 |
| 文件大小： | 565K |
| 代理商： | MC144144P |
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MC144144
18
MOTOROLA
Reading Data Using the I2C Bus
With the exception of the serial status (SS) register, which
may be read at any time, each read operation must be set up
before the data can be read from the serial output registers of
the MC144144. Data is set up for a read operation either
automatically or manually. XDS data reads are set up auto-
matically upon recovery by setting a valid XDS FILTER regis-
ter selection. All other data read operations must be set up
manually using the READ SELECT commands RDS1 and
RDS2. These commands load the selected data byte or pair
of bytes into the serial output register(s), set the SS register
RD2 bit according to the number of data bytes requested and
set the SS register DAV bit to indicate availability of data.
The MC144144 I2C bus supports one, two, and three byte
read sequences. All read sequences output the SS register
as the first output byte. If the serial status DAV bit is set, one
or two data bytes should also be read. If the DAV bit is not
set, the I2C master device should end the read sequence by
failing to acknowledge the received byte.
The number of data bytes available is indicated by the
state of the RD2 bit of the serial status. In a typical read op-
eration the status byte is read and the DAV and RD2 bits are
examined. If one or two data bytes are available they are
read in sequence separated by acknowledges. The last byte
read should not be acknowledged by the master. It is neces-
sary to read all available data in a read operation to clear the
DAV bit and permit subsequent reads. All data is output MSB
first.
SPI Bus Operation
When the SMS pin is HIGH, the MC144144 will be in the
SPI serial control mode (Figure 7). The clock line should be
tied to the SCK pin. The DATA IN signal and DATA OUT sig-
nal from the master device should be connected to the SDA
and SDO pins, respectively. The SEN pin is used to select
the MC144144 when there are multiple peripherals on the
bus.
As noted above, when both the SMS and SEN pins are
LOW, the part is in the RESET state. When the SPI bus is
used in a dedicated fashion between the master and the
MC144144, both the SEN and SMS pins would be tied HIGH.
The RESET function would require that both of these pins be
tied to the NRESET signal. To ensure synchronization, the
master should send the serial synchronization signal after
the reset is released.
When the SPI mode is used in a multiple peripheral envi-
ronment, the SEN pin is used as the MC144144 enable sig-
nal. SMS could then be used for the NRESET signal as long
as reset was only applied while SEN was LOW. In this case,
there would be no need for the master to send a serial syn-
chronization string after reset if there was at least 100 ns be-
tween the end of reset and the start of port enable.
A command string can be interrupted at any time and the
port resynchronized by sending the serial sync signal or by
the rising edge of SEN.
The SPI bus is a three–wire bus when used in a dedicated
manner between the MC144144 and the master device. If
other peripherals are connected to the bus, then the SEN pin
must be used to place this device on the bus at the appropri-
ate time. When SEN is LOW, the SDO pin will be three–state
and transitions on the SCK and SDA pins will be ignored.
If data output is not required from the MC144144, then
control can be accomplished using only the SCK and SDA
pins. Since this type of operation precludes the ability to
check the RDY bit, it is very important that commands be
spaced by at least two frames (133 ms) to ensure that one
command has been executed before initiating another.
The bus is controlled by the master device, which gener-
ates the serial clock (SCK) and initiates all actions. Clocking
data in on SDA will simultaneously produce data out on
SDO. The master should always check for the appropriate
handshake signal before executing any command, other
than NOP.
Writing to the part requires that the RDY bit be set while
reading from the part requires checking the SS register to
see if the DAV bit is set. Both of these bits are contained in
the serial status (SS) register. Writing to the MC144144 will
concurrently output the contents of the SS register, MSB first,
unless other data is being output as a result of one of the
READ commands. If it is desired to read the SS without
executing a command, the NOP command can be written at
any time, even if the serial status RDY bit is not set.
The RDY status bit is driven onto the SDO pin between
command transmissions. The controlling MCU can test the
state of this pin without clocking in order to determine if sub-
sequent serial transfers are possible. The DAV bit can only
be checked by outputing the contents of the SS register.
Writing to the SPI Bus
All write commands are either one or two byte commands.
The number of data bytes to be received by the MC144144 is
inherent in the command. If the master writes more bytes
than expected, the command may be overwritten or cor-
rupted by the extraneous bytes.
A write to the MC144144 should always be preceded by
executing a status read to verify that the device is ready. The
serial status is output by the device concurrent with the input
of any command byte. If the RDY bit of the serial status regis-
ter is set, the master device can write a new command.
The command and data bytes are written MSB first. The
first byte of a two byte command is sent first. The bits are
clocked into the MC144144 by placing the data on the SDA
input and bringing SCK high.
Reading Data Using the SPI Bus
With the exception of the SS read, each read operation
must be set up before the data can actually be read from the
serial output registers of the device. Data is set up for a read
operation either automatically or manually. XDS data is set
up for READ automatically upon recovery by setting a valid
XDS FILTER register selection. All other data read opera-
tions must be set up manually, using the READ SELECT
commands RDS1 and RDS2. These commands load the se-
lected data byte or pair of bytes into the serial output regis-
ters, set the SS register RD2 bit according to the number of
data bytes requested, and set the serial status DAV bit to in-
dicate availability of data.
The MC144144 SPI bus supports two and three byte read
sequences. In SPI mode, the SS must be read before a read
sequence is started so that the DAV and RD2 bits can be
checked. The number of data bytes available is indicated by
the state of the RD2 bit. The special command READ1 or
READ2 is then used to read the one or two available data
bytes. The serial status is clocked out during the write of the
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