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参数资料
| 型号： | MC144144P |
| 厂商： | MOTOROLA INC |
| 元件分类： | 颜色信号转换 |
| 英文描述： | Digital Signal Processors 44-JLCC -55 to 125 |
| 中文描述： | COLOR SIGNAL DECODER, PDIP18 |
| 封装： | PLASTIC, DIP-18 |
| 文件页数： | 40/44页 |
| 文件大小： | 565K |
| 代理商： | MC144144P |
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MC144144
40
MOTOROLA
LOOP FILTER CALCULATION
This section is not intended as complete loop theory; its
aim is merely to point out the peculiarities of the loop, and
provide the user with enough information for the filter compo-
nents selection. For a more in–depth covering, the cited ref-
erences should be consulted, especially [1].
The following remarks apply to the loop:
The loop frequency is 15 kHz.
In spite of the sampled nature of the loop, a continuous time
approximation is possible if the loop bandwidth is suffi-
ciently small.
Ripple on Vc is a function of loop bandwidth.
The loop is a type , 3rd order; however, since C2 is small,
the pole it creates is far removed from the low frequency
dominant poles, and the loop can be analyzed as a 2nd
order loop.
These remarks apply to the PFD:
Phase and frequency sensitive.
Independent of duty cycle.
PFD has 3 allowed states: up, down, high–Z.
The VCO is always pulled in the right direction (during
acquisition).
PFD gain is higher near lock.
The last two remarks imply that only the higher value need
be taken into account, as acquisition will be slower, but
always in the proper direction, whereas the higher gain will
enter into the action as soon as the error reaches
±
2
π
.
The following values are selected and defined:
C2 = C/10 or less, to satisfy the requirement that the
effect of C2 on the low frequency response of the loop
be minimal, and similar to a second order loop.
ζ
= 0.707 for the damping factor.
i = 15625 2
π
the input pulsation.
τ
= RC as the loop filter.
K = Ko Ip R/(2
π
N) the loop gain.
K
′
= K
τ
= 4
ζ
2 is the ‘normalized’ loop gain.
Ko = 49 106 [rad/Vs] (7.8 MHz/V).
Stability analysis, with C2
gives a minimum value of 7.5 for the ration /K and to have
some margin, a reasonable value can be 15 to 20 or higher
[1].
Selecting i/K = 20, gives: K = i/20
With K
′
= 2,
τ
= 2/K = 400
μ
s.
Using K = Ko Ip R/(2
π
N) and setting
Ip = 120
μ
A, and N an average value of 1000,
we get R = 5.1 k
.
Then for
τ
= 400
μ
s, C becomes 82 nF and C2, 3.3 nF for
C2 = C/25.
With these values, the loop natural frequency (n) and the
loop bandwidth (3 dB) can be calculated:
n = [(Ko/N) Ip/(2
π
C)]1/2 = 3400 and fn = 3400/2
π
= 540 Hz.
3 dB = 2 n = 1080 Hz (valid if
ζ
is close to 0.707).
C/10 and K
′
= 2 (= 0.707)
5000.
REFERENCES
[1] “Charge–Pump Phase–Lock Loops”, Floyd M. Gar-
dner, IEEE Transactions on Communications Vol. Com–28,
No. 11, November 1980.
[2] Phaselock Techniques Floyd M. Gardner, J. Wiley &
Sons, 1979.
[3] Phase–Locked Loops Roland E. Best, McGraw–Hill,
1984.
[4] “Phase Locked Loop Systems”, Motorola.
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