MC68302CRC16C PDF资料下载(88/128 页)4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, CPGA13

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参数资料

型号：	MC68302CRC16C
厂商：	MOTOROLA INC
元件分类：	微控制器/微处理器
英文描述：	4 CHANNEL(S), 10M bps, LOCAL AREA NETWORK CONTROLLER, CPGA132
封装：	PGA-132
文件页数：	88/128页
文件大小：	641K
代理商：	MC68302CRC16C

ETHERNET Controller

MOTOROLA

MC68EN302 REFERENCE MANUAL

4-23

Broadcast and multicast frames may be either unconditionally accepted or unconditionally

rejected. Note that multicast frames may be conditionally accepted based on a matching

table entry, either perfect or hash. Refer to Figure 4-4 and Table 4-3 for broadcast and

multicast frame address recognition.

Physical addresses are compared to perfect-match entries and either accepted or rejected.

If no perfect match occurs, the addresses may then be accepted (but not rejected) on the

basis of a hash match. Refer to Figure 4-4 and Table 4-4 for physical address recognition.

A physical address, but not a multicast address, may be rejected on the basis of a perfect

match. A hash table match alone on a physical address is not sufficient to reject that frame.

The address recognition memory is not initialized at reset; the user must initialize it before

setting ETHER_EN in ECNTRL. Perfect-match entries which are unused should be set to

all 1’s (broadcast address) which is a safe value since broadcast frame handling occurs

independently of any table entries. Unused hashmode entry bits must be set to 0.

4.6.1 BUFFER DESCRIPTOR MODIFICATION

Index values and reason fields may be passed into the upper byte of the receive buffer

descriptor’s data pointer by setting the INDEX_EN bit. This may help improve software

efficiency. If INDEX_EN is cleared, the receive buffer descriptor data pointer is not modified

by the MC68EN302. If INDEX_EN is set, the index value and reason field will be written into

all the BDs of a frame.

There are four reasons, not counting promiscuous mode, which cause a frame to be

accepted:

1. The frame is a multicast or broadcast frame and the appropriate MULT bits are set.

2. A perfect address match occurs.

3. A hash match occurs.

4. No perfect match occurs, the frame has a physical, not multicast address, and the

PA_REJ bit is set.

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