The Core
3-4
MC68322 USER’S MANUAL
MOTOROLA
3.3 INSTRUCTION SET SUMMARY
Table 3-3 lists the notational conventions used throughout this manual and Table 3-4
summarizes the core instruction set by opcode. In the syntax descriptions, the left operand
is the source operand and the right operand is the destination operand.
Table 3-3. Notational Conventions
SINGLE- AND DOUBLE-OPERAND OPERATIONS
≠
Not equal.
+
Arithmetic addition or postincrement indicator.
–
Arithmetic subtraction or predecrement indicator.
×
Arithmetic multiplication.
÷
Arithmetic division or conjunction symbol.
~
Invert; operand is logically complemented.
L
Logical AND
V
Logical OR
≈
Logical exclusive OR
-
Source operand is moved to destination operand.
=
Two operands are exchanged.
<
Relational test; true if source operand is less than destination operand.
>
Relational test; true if source operand is greater than destination operand.
<operand>
Any double-operand operation.
<operand> tested
Operand is compared to zero and the condition codes are set appropriately.
<operand> sign-extended
<operand>
All bits of the upper portion are made equal to the high-order bit of the lower portion.
<operand> shifted
by <count>
The source operand is shifted by the number of count.
<operand> rotated
by <count>
The source operand is rotated by the number of count.
bit number of <operand>
Selects a single bit of the operand.
OTHER OPERATIONS
TRAP
1
- S-bit of SR;
SSP – 4
- SSP; PC - (SSP); SSP – 2 - SSP;
SR
- (SSP); Vector Address - PC
STOP
Enter the stopped state, waiting for interrupts.
<operand>10
The operand is BCD; operations are performed in decimal.
If <condition>
then <operations>
else <operations>
Test the condition. If true, the operations after “then” are performed. If the condition is false and the optional “else”
clause is present, the operations after “else” are performed. If the condition is false and “else” is omitted, the
instruction performs no operation. Refer to the Bcc instruction description as an example.
REGISTER SPECIFICATION
An
Any Address Register n (example: A3 is address register 3)
Ax, Ay
Source and destination address registers, respectively.
Dn
Any Data Register n (example: D5 is data register 5)
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