参数资料
型号: MC68HCP11A1CFNE3
厂商: MOTOROLA INC
元件分类: 微控制器/微处理器
英文描述: 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52
封装: PLASTIC, LCC-52
文件页数: 125/158页
文件大小: 776K
代理商: MC68HCP11A1CFNE3
MC68HC11A8
ANALOG-TO-DIGITAL CONVERTER
MOTOROLA
TECHNICAL DATA
7-5
7
7.7 A/D Result Registers 1, 2, 3, and 4 (ADR1, ADR2, ADR3, and ADR4)
The A/D result registers are read-only registers used to hold an 8-bit conversion result.
Writes to these registers have no effect. Data in the A/D result registers is valid when
the CCF flag bit in the ADCTL register is set, indicating a conversion sequence is com-
plete. If conversion results are needed sooner refer to Figure 7-1. For example the
ADR1 result is valid 33 cycles after an ADCTL write. Refer to the A/D channel assign-
ments in Table 7-1 for the relationship between the channels and the result registers.
7.8 A/D Power-Up and Clock Select
A/D power-up is controlled by bit 7 (ADPU) of the OPTION register. When ADPU is
cleared, power to the A/D system is disabled. When ADPU is set, the A/D system is
enabled. A delay of as much as 100 microseconds is required after turning on the A/
D converter to allow the analog bias voltages to stabilize.
Clock select is controlled by bit 6 (CSEL) of the OPTION register. When CSEL is
cleared, the A/D system uses the system E clock. When CSEL is set, the A/D system
uses an internal R-C clock source, which runs at about 1.5 MHz. The MCU E clock is
not suitable to drive the A/D system if it is operating below 750 kHz, in which case the
R-C internal clock should be selected. A delay of 10 ms is required after changing
CSEL from zero to one to allow the R-C oscillator to start and internal bias voltages to
settle. Refer to 9.1.5 Configuration Options Register (OPTION) for additional infor-
mation. Note that the CSEL control bit also enables a separate R-C oscillator to drive
the EEPROM charge pump.
When the A/D system is operating with the MCU E clock, all switching and comparator
operations are synchronized to the MCU clocks. This allows the comparator results to
be sampled at quiet clock times to minimize noise errors. The internal R-C oscillator is
asynchronous to the MCU clock so noise will affect A/D results more while CSEL = 1.
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