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参数资料
型号： MC68HCP11A1CFNE3
厂商： MOTOROLA INC
元件分类： 微控制器/微处理器
英文描述： 8-BIT, EEPROM, 3 MHz, MICROCONTROLLER, PQCC52
封装： PLASTIC, LCC-52
文件页数： 17/158页
文件大小： 776K
代理商： MC68HCP11A1CFNE3
MC68HC11A8
CPU, ADDRESSING MODES, AND INSTRUCTION SET
MOTOROLA
TECHNICAL DATA
10-15
10
2-16
WAI
14 + n
1
2
3
4
5
6
7
8
9
10
11
12 to
n + 12
n + 13
n + 14
Opcode Address
Opcode Address + 1
Stack Pointer
Stack Pointer – 1
Stack Pointer – 2
Stack Pointer – 3
Stack Pointer – 4
Stack Pointer – 5
Stack Pointer – 6
Stack Pointer – 7
Stack Pointer – 8
Address of Vector
(First Location)
Address of Vector + 1
(Second Location)
1
0
1
Opcode ($3E)
Irrelevant Data
Return Address (Low Byte)
Return Address (High Byte)
IYL (Low Byte) to Stack
IYH (High Byte) to Stack
IXL (Low Byte) to Stack
IXH (High Byte) to Stack
A Accumulator to Stack
B Accumulator to Stack
Condition Code Register to
Stack
Irrelevant Data
Service Routine Address (High
Byte)
Service Routine Address (Low
Byte)
2-17
FDIV, IDIV
41
1
2
3 – 41
Opcode Address
Opcode Address + 1
$FFFF
1
Opcode
Irrelevant Data
2-18
Page 1 Illegal
Opcodes
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Opcode Address
Opcode Address + 1
$FFFF
Stack Pointer
Stack Pointer – 1
Stack Pointer – 2
Stack Pointer – 3
Stack Pointer – 4
Stack Pointer – 5
Stack Pointer – 6
Stack Pointer – 7
Stack Pointer – 8
Address of Vector
(First Location)
Address of Vector + 1
(Second Location)
1
0
1
Opcode (Illegal)
Irrelevant Data
Return Address (Low Byte)
Return Address (High Byte)
IYL (Low Byte) to Stack
IYH (High Byte) to Stack
IXL (Low Byte) to Stack
IXH (High Byte) to Stack
A Accumulator
B Accumulator
Condition Code Register to
Stack
Irrelevant Data
Service Routine Address
(High Byte)
Service Routine Address
(Low Byte)
2-19
Pages 2, 3, or 4
Illegal Opcodes
16
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Opcode Address
Opcode Address + 1
Opcode Address + 2
$FFFF
Stack Pointer
Stack Pointer – 1
Stack Pointer – 2
Stack Pointer – 3
Stack Pointer – 4
Stack Pointer – 5
Stack Pointer – 6
Stack Pointer – 7
Stack Pointer – 8
Address of Vector
(First Location)
Address of Vector + 1
(Second Location)
1
0
1
Opcode (Legal Page Select)
Opcode (Illegal Second Byte)
Irrelevant Data
Return Address (Low Byte)
Return Address (High Byte)
IYL (Low Byte) to Stack
IYH (High Byte) to Stack
IXL (Low Byte) to Stack
IXH (High Byte) to Stack
A Accumulator
B Accumulator
Condition Code Register to
Stack
Irrelevant Data
Service Routine Address
(High Byte)
Service Routine Address
(Low Byte)
Table 10-2 Cycle-by-Cycle Operation — Inherent Mode (Sheet 3 of 4)
Reference
Number*
Address Mode
and Instructions
Cycles Cycle
#
Address Bus
R/W
Line
Data Bus
* The reference number is given to provide a cross-reference to Table 10-1.
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