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| 型号： | MCP2030A-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 25/66页 |
| 文件大小： | 0K |
| 描述： | IC KEYLESS ENTRY AFE 3CH 14PDIP |
| 标准包装： | 30 |
| RF 型： | PEG，TPMS |
| 频率： | 125kHz |
| 特点： | 4 通道 |
| 封装/外壳： | 14-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-PDIP |
| 包装： | 管件 |
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MCP2030
3.0
PIN DESCRIPTIONS
TABLE 3-1:
PIN FUNCTION TABLES
Pin No.
1
2
3
Symbol
V SS
CS
SCLK/ALERT
I/O/P
P
I
I/O
Function
Ground Pin.
Chip Select Digital Input Pin.
Clock input for the modified 3-wire SPI interface.
ALERT output: This pin goes low if there is a parity error in the
Configuration register or the 32 ms alarm timer is timed out.
4
5
6
RSSI
NC
LFDATA/CCLK/SDIO
O
N/A
I/O
Received Signal Strength Indicator (RSSI) current output.
No Connect.
Demodulated data output.
Carrier clock output.
Serial input or output data for the modified 3-wire SPI interface.
7
8
9
10
11
12
13
14
V DD
V DD
LCZ
LCY
LCX
NC
LCCOM
V SS
P
P
I
I
I
N/A
I
P
Positive Supply Voltage Pin.
Positive Supply Voltage Pin.
Input pin for external LC antennas.
Input pin for external LC antennas.
Input pin for external LC antennas.
No Connect.
Common reference input for the external LC antennas.
Ground Pin.
Type Identification: I = Input; O = Output; P = Power
3.1
Supply Voltage (V DD , V SS )
3.3
SPI Clock Input (SCLK/ALERT)
The V DD pin is the power supply pin for the analog and
digital circuitry within the MCP2030. This pin requires
an appropriate bypass capacitor of 0.1 μF. The voltage
on this pin should be maintained in the 2.0V-3.6V range
for specified operation.
The V SS pin is the ground pin and the current return
path for both analog and digital circuitry of the
MCP2030. If an analog ground plane is available, it is
This pin becomes the SPI clock input (SCLK) when CS
is low, and becomes the ALERT output when CS is
high.
The ALERT pin is an open collector output. This pin has
an internal pull-up resistor to ensure that no spurious
SPI communication occurs between power-up and pin
configuration of the MCU.
recommended that this device be tied to the analog
ground plane of the PCB.
3.4
Received Signal Strength
Indicator (RSSI)
3.2
Chip Select (CS)
This pin becomes the Received Signal Strength Indicator
(RSSI) output current sink when the RSSI output option
The CS pin needs to stay high when the device is
receiving input signals. Leaving the CS pin low will
place the device in the SPI Programming mode.
The CS pin is an open collector output. This pin has an
internal pull-up resistor to ensure that no spurious SPI
communication occurs between power-up and pin
configuration of the MCU.
? 2005 Microchip Technology Inc.
is selected.
DS21981A-page 25
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