参数资料
型号: MCP2030A-I/P
厂商: Microchip Technology
文件页数: 4/66页
文件大小: 0K
描述: IC KEYLESS ENTRY AFE 3CH 14PDIP
标准包装: 30
RF 型: PEG,TPMS
频率: 125kHz
特点: 4 通道
封装/外壳: 14-DIP(0.300",7.62mm)
供应商设备封装: 14-PDIP
包装: 管件
MCP2030
AC Characteristics
Electrical Specifications: Standard Operating Conditions (unless otherwise stated)
Supply Voltage 2.0V ≤ V DD ≤ 3.6V
Operating temperature -40°C ≤ T A ≤ +85°C
LCCOM connected to V SS
LC Signal Input Sinusoidal 300 mV PP
Carrier Frequency 125 kHz
LCCOM connected to V SS
Parameters
Sym.
Min.
Typ?
Max.
Units
Conditions
Input Sensitivity
V SENSE
V DD = 3.0V
1
3.0
6
mV PP
Output enable filter disabled
AGCSIG = 0 ; MODMIN = 00
(33% modulation depth setting)
Input = Continuous Wave (CW)
Output = Logic level transition from
low-to-high at sensitivity level for CW input.
Coil de-Q’ing Voltage -
RF Limiter (R FLM ) must be active
RF Limiter Turn-on Resistance
V DE_Q
R FLM
3
300
5
700
V
Ω
V DD = 3.0V, Force I IN = 5 μ A (worst case)
V DD = 2.0V, V IN = 8 V DC
(LCX, LCY, LCZ)
Sensitivity Reduction
S ADJ
V DD = 3.0V
0
-30
dB
dB
No sensitivity reduction selected
Max. reduction selected
Monotonic increment in attenuation value
from setting = 0000 to 1111 by design
Minimum Modulation Depth
V IN_MOD
V DD = 3.0V
60% setting
33% setting
14% setting
8%
60
33
14
8
84
49
26
%
%
%
%
See Section 5.21 “Minimum Modulation
Depth Requirement for Input Signal” .
See Modulation Depth Definition in
Figure 5-5.
Carrier frequency
F CARRIER
125
kHz
Input modulation frequency
F MOD
10
kHz
Input data rate with NRZ data format.
V DD = 3.0V
Minimum modulation depth setting = 33%
Input conditions:
Amplitude = 300 mV PP
Modulation depth = 100%
LCX Tuning Capacitor
C TUNX
V DD = 3.0V,
44
0
59
82
pF
pF
Config. Reg. 1, bits <6:1> Setting = 000000
63 pF ±30%
Config. Reg. 1, bits <6:1> Setting = 111111
63 steps, approx. 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
LCY Tuning Capacitor
C TUNY
V DD = 3.0V,
44
0
59
82
pF
pF
Config. Reg. 2, bits <6:1> Setting = 000000
63 pF ±30%
Config. Reg. 2, bits <6:1> Setting = 111111
63 steps, approx. 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
LCZ Tuning Capacitor
C TUNZ
V DD = 3.0V,
44
0
59
82
pF
pF
Config. Reg. 3, bits<6:1> Setting = 000000
63 pF ±30%
Config. Reg. 3, bits<6:1> Setting = 111111
63 steps, approx. 1 pF/step
Monotonic increment in capacitor value from
setting = 000000 to 111111 by design
Q of Internal Tuning Capacitors
Q_C
50 *
Demodulator Charge Time
(delay time of demodulated output to rise)
T DR
50
μ s
V DD = 3.0V
Minimum modulation depth setting = 33%
Input conditions:
Amplitude = 300 mV PP
Modulation depth = 100%
*
?
Parameter is characterized but not tested.
Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not tested.
Note
1:
2:
Required output enable filter high time must account for input path analog delays (= T OEH - T DR + T DF ).
Required output enable filter low time must account for input path analog delays (= T OEL + T DR - T DF ).
DS21981A-page 4
? 2005 Microchip Technology Inc.
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