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| 型号： | MCP2030A-I/P |
| 厂商： | Microchip Technology |
| 文件页数： | 55/66页 |
| 文件大小： | 0K |
| 描述： | IC KEYLESS ENTRY AFE 3CH 14PDIP |
| 标准包装： | 30 |
| RF 型： | PEG，TPMS |
| 频率： | 125kHz |
| 特点： | 4 通道 |
| 封装/外壳： | 14-DIP（0.300"，7.62mm） |
| 供应商设备封装： | 14-PDIP |
| 包装： | 管件 |
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MCP2030
REGISTER 5-8:
STATUS REGISTER 7 (ADDRESS: 0111)
R-0
CHZACT
R-0
CHYACT
R-0
CHXACT
R-0
AGCACT
R-0
WAKEZ
R-0
WAKEY
R-0
WAKEX
R-0
ALARM
R-0
PEI
bit 8
bit 0
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
CHZACT : Channel Z Active (1) bit (cleared via Soft Reset)
1 = Channel Z is passing data after T AGC
0 = Channel Z is not passing data after T AGC
CHYACT : Channel Y Active (1) bit (cleared via Soft Reset)
1 = Channel Y is passing data after T AGC
0 = Channel Y is not passing data after T AGC
CHXACT : Channel X Active (1) bit (cleared via Soft Reset)
1 = Channel X is passing data after T AGC
0 = Channel X is not passing data after T AGC
AGCACT : AGC Active Status bit (real time, cleared via Soft Reset)
1 = AGC is active (Input signal is strong). AGC is active when input signal level is approximately > 20 mV PP
range.
0 = AGC is inactive (Input signal is weak)
WAKEZ : Wake-up Channel Z Indicator Status bit (cleared via Soft Reset)
1 = Channel Z caused a device wake-up (passed ÷ 64 clock counter)
0 = Channel Z did not cause a device wake-up
WAKEY : Wake-up Channel Y Indicator Status bit (cleared via Soft Reset)
1 = Channel Y caused a device wake-up (passed ÷ 64 clock counter)
0 = Channel Y did not cause a device wake-up
WAKEX : Wake-up Channel X Indicator Status bit (cleared via Soft Reset)
1 = Channel X caused a device wake-up (passed ÷ 64 clock counter)
0 = Channel X did not cause a device wake-up
ALARM : Indicates whether an Alarm timer time-out has occurred (cleared via read “STATUS Register
command”)
1 = The Alarm timer time-out has occurred. It may cause the ALERT output to go low depending on the state
of bit 4 of the Configuration register 0
0 = The Alarm timer is not timed out
PEI : Parity Error Indicator bit – indicates whether a Configuration register parity error has occurred (real time)
1 = A parity error has occurred and caused the ALERT output to go low
0 = A parity error has not occurred
Legend:
Note 1:
Bit is high whenever channel is passing data. Bit is low in Standby mode.
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
See Table 5-7 for the bit conditions of the AFE STATUS
register after various SPI commands and the AFE
Power-on Reset.
? 2005 Microchip Technology Inc.
DS21981A-page 55
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