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参数资料
| 型号： | MSC7119VM1200 |
| 厂商： | FREESCALE SEMICONDUCTOR INC |
| 元件分类： | 数字信号处理 |
| 英文描述： | 0-BIT, 300 MHz, OTHER DSP, PBGA400 |
| 封装： | LEAD FREE, MAPBGA-400 |
| 文件页数： | 49/60页 |
| 文件大小： | 1138K |
| 代理商： | MSC7119VM1200 |
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Hardware Design Considerations
MSC7119 Data Sheet, Rev. 8
Freescale Semiconductor
53
When booting from a power-on reset, the HDI16 is additionally configurable as follows:
8- or 16-bit mode as specified by the H8BIT pin.
Data strobe as specified by the HDSP and HDDS pins.
These pins are sampled only on the deassertion of power-on reset. During a boot from a hard reset, the configuration of these
pins is unaffected.
Note:
When the HDI16 is used for booting or other purposes, bit 0 is the least significant bit and not the most significant bit
as for other DSP products.
3.4.3.2
I2C Boot
When the MSC7119 device is configured to boot from the I
2C port, the boot program configures the GPIO pins for I2C
operation. Then the MSC7118 device initiates accesses to the I
2C module, downloading data to the MSC7118 device. The I2C
interface is configured as follows:
PLL is disabled and bypassed so that the I
2C module is clocked with the IPBus clock.
I
2C interface operates in master mode and polling is used.
EPROM operates in slave mode.
Clock divider is set to 128.
Address of slave during boot is 0xA0.
The IPBus clock is internally divided to generate the bit clock, as follows:
CLKIN must be a maximum of 100 MHz
PLL is bypassed.
IPBus clock = CLKIN/2 is a maximum of 50 MHz.
I2C bit clock must be less than or equal to:
— IPBus clock/I2C clock divider
— 50 MHz (max)/128
— 390.6 KHz
This satisfies the maximum clock rate requirement of 400 kbps for the I2C interface. For details on the boot procedure, see the
“Boot Program” chapter of the MSC711x Reference Manual.
3.4.3.3
SPI Boot
When the MSC7119 device is configured to boot from the SPI port, the boot program configures the GPIO pins for SPI
operation. Then the MSC7118 device initiates accesses to the SPI module, downloading data to the MSC7118 device. When
the SPI routines run in the boot ROM, the MSC7118 is always configured as the SPI master. Booting through the SPI is
supported for serial EEPROM devices and serial Flash devices. When a READ_ID instruction is issued to the serial memory
device and the device returns a value of 0x00 or 0xFF, the routines for accessing a serial EEPROM are used, at a maximum
frequency of 4 Mbps. Otherwise, the routines for accessing a serial Flash are used, and they can run at faster speeds. Booting is
performed through one of two sets of pins:
Main set: BM[2–3], HA3, and HCS2, which allow use of the PLL.
Alternate set: UTXD, URXD, SDA, and SCL, which cannot be used with the PLL.
In either configuration, an error during SPI boot is flagged on the EVNT3 pin. For details on the boot procedure, see the “Boot
Program” chapter of the MSC711x Reference Manual.
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相关代理商/技术参数 |
参数描述 |
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| MSC711XADS | 功能描述:开发板和工具包 - 其他处理器 DEV SYS FOR FSL 711X DEV RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MSC711XEVM | 功能描述:开发板和工具包 - 其他处理器 EVAL KIT W/FULL LIC CW RoHS:否 制造商:Freescale Semiconductor 产品:Development Systems 工具用于评估:P3041 核心:e500mc 接口类型:I2C, SPI, USB 工作电源电压: |
| MSC711XEVMT | 功能描述:KIT EVAL W/FULL LIC CW RoHS:是 类别:编程器，开发系统 >> 过时/停产零件编号 系列:* 标准包装:1 系列:- 传感器类型:CMOS 成像，彩色（RGB） 传感范围:WVGA 接口:I²C 灵敏度:60 fps 电源电压:5.7 V ~ 6.3 V 嵌入式:否 已供物品:成像器板 已用 IC / 零件:KAC-00401 相关产品:4H2099-ND - SENSOR IMAGE WVGA COLOR 48-PQFP4H2094-ND - SENSOR IMAGE WVGA MONO 48-PQFP |
| MSC7121VRF | 制造商:Freescale Semiconductor 功能描述:GPON UMC 140 MHZ - Trays |
| MSC7128 | 制造商:OKI 制造商全称:OKI electronic componets 功能描述:5 x 7-Dot Character x 16-Digit Display Controller/Driver |
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