参数资料
型号: MT42L256M32D4MG-25 IT:A
厂商: Micron Technology Inc
文件页数: 43/164页
文件大小: 0K
描述: IC LPDDR2 SDRAM 8GBIT 134FBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: 移动 LPDDR2 SDRAM
存储容量: 8G(356M x 32)
速度: 400MHz
接口: 并联
电源电压: 1.14 V ~ 1.3 V
工作温度: -25°C ~ 85°C
封装/外壳: 134-TFBGA
供应商设备封装: 134-FBGA(11.5x11.5)
包装: 散装
2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Mode Register Definition
Tx is the point where any power supply drops below the minimum value specified in
the Recommended DC Operating Conditions table.
Tz is the point where all power supplies are below 300mV. After Tz, the device is pow-
ered off.
Required Power Supply Conditions Between Tx and Tz:
?
?
?
?
V DD1 must be greater than V DD2 - 200mV
V DD1 must be greater than V DDCA - 200mV
V DD1 must be greater than V DDQ - 200mV
V REF must always be less than all other supply voltages
The voltage difference between V SS , V SSQ , and V SSCA must not exceed 100mV.
For supply and reference voltage operating conditions, see Recommended DC Operat-
ing Conditions table.
Uncontrolled Power-Off
When an uncontrolled power-off occurs, the following conditions must be met:
? At Tx, when the power supply drops below the minimum values specified in the Rec-
ommended DC Operating Conditions table, all power supplies must be turned off and
all power-supply current capacity must be at zero, except for any static charge re-
maining in the system.
? After Tz (the point at which all power supplies first reach 300mV), the device must
power off. The time between Tx and Tz must not exceed t POFF. During this period, the
relative voltage between power supplies is uncontrolled. V DD1 and V DD2 must de-
crease with a slope lower than 0.5 V/μs between Tx and Tz.
An uncontrolled power-off sequence can occur a maximum of 400 times over the life of
the device.
Table 9: Power-Off Timing
Parameter
Maximum power-off ramp time
Symbol
t POFF
Min
Max
2
Unit
sec
Mode Register Definition
LPDDR2 devices contain a set of mode registers used for programming device operating
parameters, reading device information and status, and for initiating special operations
such as DQ calibration, ZQ calibration, and device reset.
Mode Register Assignments and Definitions
The MRR command is used to read from a register. The MRW command is used to write
to a register. An “R” in the access column of the mode register assignment table indi-
cates read-only; a “W” indicates write-only; “R/W” indicates read or write capable or
enabled.
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
43
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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