参数资料
型号: MT42L256M32D4MG-25 IT:A
厂商: Micron Technology Inc
文件页数: 60/164页
文件大小: 0K
描述: IC LPDDR2 SDRAM 8GBIT 134FBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: 移动 LPDDR2 SDRAM
存储容量: 8G(356M x 32)
速度: 400MHz
接口: 并联
电源电压: 1.14 V ~ 1.3 V
工作温度: -25°C ~ 85°C
封装/外壳: 134-TFBGA
供应商设备封装: 134-FBGA(11.5x11.5)
包装: 散装
2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Burst READ Command
Figure 35: t DQSCKDS Timing
Tn
Tn + 1
Tn + 2
Tn + 3
Tn + 4
Tn + 5
Tn + 6
Tn + 7
Tn + 8
CK#
CK
RL = 5
CA
[9:0]
Bank n
col addr
Col addr
CMD
READ
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
tDQSCKn
DQS#
DQS
DQ
D OUT A0
D OUT A1
D OUT A2
D OUT A3
D OUT A4
160ns maximum…
1
Tm
Tm + 1
Tm + 2
Tm + 3
Tm + 4
Tm + 5
Tm + 6
Tm + 7
Tm + 8
CK#
CK
RL = 5
CA
[9:0]
Bank n
col addr
Col addr
CMD
READ
NOP
NOP
NOP
NOP
NOP
NOP
NOP
NOP
t DQSCKm
DQS#
DQS
DQ
D OUT A2
D OUT A3
D OUT A0
D OUT A1
D OUT A2
D OUT A3
D OUT A0
D OUT A1
D OUT A2
D OUT A3
D OUT A0
D OUT A1
D OUT A2
D OUT A3
D OUT A0
D OUT A1
D OUT A2
D OUT A3
…160ns maximum
1
Notes:
Transitioning data
1. t DQSCKDS = ( t DQSCK n - t DQSCK m ).
2. t DQSCKDS (MAX) is defined as the maximum of ABS ( t DQSCK n - t DQSCK m ) for any
( t DQSCK n , t DQSCK m ) pair for READs within a consecutive burst, within any 160ns rolling
window.
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
60
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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