参数资料
型号: MT42L256M32D4MG-25 IT:A
厂商: Micron Technology Inc
文件页数: 51/164页
文件大小: 0K
描述: IC LPDDR2 SDRAM 8GBIT 134FBGA
标准包装: 1,000
格式 - 存储器: RAM
存储器类型: 移动 LPDDR2 SDRAM
存储容量: 8G(356M x 32)
速度: 400MHz
接口: 并联
电源电压: 1.14 V ~ 1.3 V
工作温度: -25°C ~ 85°C
封装/外壳: 134-TFBGA
供应商设备封装: 134-FBGA(11.5x11.5)
包装: 散装
2Gb: x16, x32 Mobile LPDDR2 SDRAM S4
Mode Register Definition
Table 31: MR9 Test Mode (MA[7:0] = 09h)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Vendor-specific test mode
Table 32: MR10 Calibration (MA[7:0] = 0Ah)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
S4
Calibration code
Table 33: MR10 Op-Code Bit Definitions
Notes 1–4 apply to a ll parameter s and conditions
Feature
Calibration code
Type
Write-only
OP
OP[7:0]
Definition
0xFF: Calibration command after initialization
0xAB: Long calibration
0x56: Short calibration
0xC3: ZQRESET
All others: Reserved
Notes:
1.
2.
3.
4.
Host processor must not write MR10 with reserved values.
The device ignores calibration commands when a reserved value is written into MR10.
See AC timing table for the calibration latency.
If ZQ is connected to V SSCA through R ZQ , either the ZQ calibration function (see MRW ZQ
Calibration Commands (page 92)) or default calibration (through the ZQRESET com-
mand) is supported. If ZQ is connected to V DDCA , the device operates with default cali-
bration, and ZQ calibration commands are ignored. In both cases, the ZQ connection
must not change after power is supplied to the device.
Table 34: MR[11:15] Reserved (MA[7:0] = 0Bh–0Fh)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Reserved
Table 35: MR16 PASR Bank Mask (MA[7:0] = 010h)
OP7
OP6
OP5
OP4
OP3
OP2
OP1
OP0
Bank mask (4-bank or 8-bank)
Table 36: MR16 Op-Code Bit Definitions
Feature
Bank[7:0] mask
Type
Write-only
OP
OP[7:0]
Definition
0b: refresh enable to the bank = unmasked (default)
1b: refresh blocked = masked
Note:
1. For 4-bank devices, only OP[3:0] are used.
PDF: 09005aef83f3f2eb
2gb_mobile_lpddr2_s4_g69a.pdf – Rev. N 3/12 EN
51
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2010 Micron Technology, Inc. All rights reserved.
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