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| 型号： | MT46H256M32L4CM-54IT:A |
| 元件分类： | DRAM |
| 英文描述： | 256M X 32 DDR DRAM, 5 ns, PBGA90 |
| 封装： | 10 X 13 MM, GREEN, PLASTIC, VFBGA-90 |
| 文件页数： | 5/106页 |
| 文件大小： | 3431K |
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Figure 60: Power-Down Mode (Active or Precharge)
CK
CK#
Command
Valid2
NOP
Address
CKE
DQ
DM
DQS
tCK
tCH
tCL
tIS
tIH
tIS
tIS tIH
tIH
Enter3
power-down
mode
Exit
power-down
mode
Must not exceed refresh device limits
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T0
T1
Ta0
Ta1
Ta2
T2
NOP
Don’t Care
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Valid
Tb1
tXP1
tCKE1
tCKE
Valid
No read/write
access in progress
Valid
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Notes: 1. tCKE applies if CKE goes LOW at Ta2 (entering power-down); tXP applies if CKE remains
HIGH at Ta2 (exit power-down).
2. If this command is a PRECHARGE (or if the device is already in the idle state), then the
power-down mode shown is precharge power-down. If this command is an ACTIVE (or if
at least 1 row is already active), then the power-down mode shown is active power-down.
3. No column accesses can be in progress when power-down is entered.
Deep Power-Down
Deep power-down (DPD) is an operating mode used to achieve maximum power reduc-
tion by eliminating power to the memory array. Data will not be retained after the
device enters DPD mode.
Before entering DPD mode the device must be in the all banks idle state with no activity
on the data bus (tRP time must be met). DPD mode is entered by holding CS# and WE#
LOW with RAS# and CAS# HIGH at the rising edge of the clock while CKE is LOW. CKE
must be held LOW to maintain DPD mode. The clock must be stable prior to exiting
DPD mode. To exit DPD mode, assert CKE HIGH with either a NOP or DESELECT com-
mand present on the command bus. After exiting DPD mode, a full DRAM initialization
sequence is required.
2Gb: x16, x32 Mobile LPDDR SDRAM
Power-Down
PDF: 09005aef83a73286
2gb_ddr_mobile_sdram_t69m.pdf - Rev. M 11/10 EN
102
Micron Technology, Inc. reserves the right to change products or specifications without notice.
2009 Micron Technology, Inc. All rights reserved.
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