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| 型号： | MTA85812S-10I/SS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 10 MHz, RISC MICROCONTROLLER, PDSO20 |
| 封装： | 0.209 INCH, PLASTIC, SSOP-20 |
| 文件页数： | 10/72页 |
| 文件大小： | 760K |
| 代理商： | MTA85812S-10I/SS |
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MTA85XXX
DS40115C-page 18
1995 Microchip Technology Inc.
6.0
SPECIAL PURPOSE
REGISTERS
6.1
W (Working) Register
Holds second operand in two operand instructions and/
or supports the internal data transfer.
6.2
TRISA I/O Control Register For
PORTA
Only
bits
(STATUS
<3:0>)
are
available.
The
corresponding I/O port (f5) is only 4-bit wide.
6.3
TRISB I/O Control Register For
PORTB
The I/O control registers will be loaded with the content
of the W register, by executing of the TRIS f instruction.
A '1' in the I/O control register will put the corresponding
I/O pin into a high impedance mode. A '0' puts the con-
tents of file register PORTA or PORTB, respectively,
out on the selected I/O pins.
These registers are "write-only" and are set to all '1's
upon a RESET.
6.4
OPTION Prescaler/T0CKI OPTION
Register
Defines
prescaler assignment (T0CKI or WDT),
prescaler value, signal source and signal edge for the
T0CKI. The OPTION register is "write-only" and is 6-
bits wide.
By executing the OPTION instruction, the contents of
the W register will be transferred to the OPTION
register. Upon a RESET, the OPTION register is set.
FIGURE 6-1:
OPTION REGISTER
PSA
PS2 PS1
PS0
U
R/W
R/W R/W
bit0
—
RTS
RTE
bit7
PS2
PS1
PS0
PSA: Prescaler assignment bit
RTE:
T0CKI signal edge
RTS:
T0CKI signal source
PRESCALER VALUE
0
1
0
1
0
1
0
1
0
1
0
1
0
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
1 : 256
1 : 1
1 : 2
1 : 4
1 : 8
1 : 16
1 : 32
1 : 64
1 : 128
Address:
POR value: 111111b
W:
Writable
R:
Readable
U:
Unimplemented.
Read as '0'
T0CKI RATE
WDT RATE
1 = Prescaler assigned to the WDT
0 = Prescaler assigned to T0CKI
1 = Increment on high-to-low transition on T0CKI pin
0 = Increment on low-to-high transition on T0CKI pin
1 = Transition on T0CKI pin
0 = Internal instruction cycle clock (CLKOUT)
PS2:PS0
11
1
Register:
OPTION
Unimplemented: reads as 0
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