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| 型号： | MTA85812S-10I/SS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, OTPROM, 10 MHz, RISC MICROCONTROLLER, PDSO20 |
| 封装： | 0.209 INCH, PLASTIC, SSOP-20 |
| 文件页数： | 3/72页 |
| 文件大小： | 760K |
| 代理商： | MTA85812S-10I/SS |
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1995 Microchip Technology Inc.
DS40115C-page 11
MTA85XXX
5.1
Data Memory Organization
The 8-bit data bus connects two basic functional ele-
ments together: the register file composed of up to 80
addressable 8-bit registers including the I/O ports, and
an 8-bit wide Arithmetic Logic Unit (ALU). 32 bytes of
RAM are directly addressable while a “banking”
scheme, with banks of 16 bytes each, is employed to
address larger data memories (Figure 5-1). Data can
be addressed directly, or indirectly using the File Select
Register (FSR). Immediate data addressing is sup-
ported by special “literal” instructions which load data
from program memory into the W register.
The register file is divided into two functional groups:
Special Function registers and General Purpose regis-
ters. The special function registers include the Timer0
(TMR0) register, the Program Counter (PC), the Status
Register, the I/O registers (ports), and the File Select
Register (FSR). The general purpose registers are
used for data and control information under command
of the instructions.
In addition, special purpose registers are used to con-
trol the I/O port configuration and prescaler options.
5.1.1
GENERAL PURPOSE REGISTER FILE
The register file is accessed either directly or indirectly
through the file select register FSR.
5.1.2
SPECIAL FUNCTION REGISTERS:
The Special Function Registers are registers used by
the CPU and peripheral functions to control the opera-
tion of the device (Table 5-1).
The special registers can be classified into two sets.
The special registers associated with the “core” func-
tions are described in this section. Those related to the
operation of the peripheral features are described in
the section for each peripheral feature.
TABLE 5-1:
PIC16C5X REGISTER FILE SUMMARY
Address
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
Power-On
Reset
Value on
MCLR and
WDT resets
00h
INDF
Uses contents of FSR to address data memory (not a physical register)
---- ----
01h
TMR0
8-bit real-time clock/counter
xxxx xxxx
uuuu uuuu
02h
PCL
Low order 8 bits of PC
1111 1111
03h
STATUS
PA2
PA1
PA0
TO
PD
ZDC
C
0001 1xxx
000? ?uuu
04h
FSR
Indirect data memory address pointer 0
xxxx xxxx
uuuu uuuu
05h
PORTA
—
RA3
RA2
RA1
RA0
---- xxxx
---- uuuu
06h
PORTB
RB7
RB6
RB5
RB4
RB3
RB2
RB1
RB0
xxxx xxxx
uuuu uuuu
07h
PORTC 2
RC7
RC6
RC5
RC4
RC3
RC2
RC1
RC0
xxxx xxxx
uuuu uuuu
Legend: x = unknown, u = unchanged. - = unimplemented, read as '0'.
Note 1:
The upper byte of the program counter is not directly accessible. The upper bits can be set or cleared by writing to
PA1:PA0 (STATUS<6:5>).
2:
File address 7h is a general purpose register on the PIC16C54A and PIC16C58A/CR58A.
3:
Shading indicates unimplemented bits.
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