参数资料
型号: NCN6000DTBR2G
厂商: ON Semiconductor
文件页数: 2/36页
文件大小: 0K
描述: IC INTERFACE SMART CARD 20TSSOP
产品变化通告: Product Obsolescence 01/Jul/2009
标准包装: 1
应用: ATM 终端,气泵,ISM
接口: 微控制器
电源电压: 2.7 V ~ 6 V
封装/外壳: 20-TSSOP(0.173",4.40mm 宽)
供应商设备封装: 20-TSSOP
包装: 剪切带 (CT)
安装类型: 表面贴装
其它名称: NCN6000DTBR2GOSCT
NCN6000
http://onsemi.com
10
DIGITAL PARAMETERS SECTION @ 2.70 V
vVbatv6.0 V, NORMAL OPERATING MODE (25°C to +85°C ambient
temperature, unless otherwise noted.) Note: Digital inputs undershoot < 0.30 V to ground, Digital inputs overshoot <0.30 V to Vbat
Rating
Symbol
Pin
Min
Typ
Max
Unit
Input Asynchronous Clock Duty Cycle = 50%
@ Vbat = 3.0V over the temperature range
FCLKIN
10
40
MHz
Clock Rise Time
Clock Fall Time
Ftr
Ftf
10
5.0
ns
I/O Data Transfer Switching Time,
Both Directions (I/O and CRD_IO),
@ Cout = 30 pF
I/O Rise Time* (Note 7)
I/O Fall Time
TRIO
TFIO
8, 14
0.8
ms
Input/Output Data Transfer Time, Both Directions
@ 50% CRD_VCC, L to H and H to L
TTIO
8, 14
150
ns
Minimum PWR_ON Low Level Logic State Time
to Power Down the DCDC Converter
TWON
4
2.0
ms
CRD_VCC Power Up/Down Sequence Interval
TDSEQ
0.5
2.0
ms
STATUS Pull Up Resistance
RSTA
5
20
50
80
k
W
Chip Select CS Pull Up Resistance
RCSPU
6
20
50
80
k
W
Interrupt INT Pull Up Resistance
RINTPU
9
20
50
80
k
W
Positive Going Input High Voltage Threshold (A0,
A1, PGM, PWR_ON, CS, RESET, CRD_DET)
VIH
1, 2,
3, 4,
6, 7,
11
0.70 * Vbat
Vbat
V
Negative Going Input High Voltage Threshold
(A0, A1, PGM, PWR_ON, CS, RESET,
CRD_DET)
VIL
1, 2,
3, 4,
6, 7,
11
0
0.30 * Vbat
V
Output High Voltage
STATUS, INT @ IOH = 10 mA
VOH
5, 9
Vbat 1.0 V
V
Output High Voltage
STATUS, INT @ IOH = 200 mA
VOL
5, 9
0.40
V
7. Since a 20 k
W pull up resistor is provided by the NCN6000, the external MPU can use an Open Drain connection.
DIGITAL PARAMETERS SECTION @ 2.70 V
vVbatv6.0 V, CHIP PROGRAMMING MODE (25°C to +85°C ambient
temperature, unless otherwise noted.)
Rating
Symbol
Pin
Min
Typ
Max
Unit
A0, A1, PGM, PWR_ON, RESET and I/O
Data Set Up Time
TSMOD
1, 2,
3, 4,
7, 8
2.0
ms
A0, A1, PGM, PWR_ON, RESET and I/O
Data Set Up Time
THMOD
1, 2,
3, 4,
7, 8
2.0
ms
Chip Select CS Low State Pulse Width
TWCS
6
2.0
ms
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