NCN6000
http://onsemi.com
9
POWER SUPPLY SECTION (25
°C to +85°C ambient temperature, unless otherwise noted.)
Rating
Symbol
Pin
Min
Typ
Max
Unit
Power Supply
Vbat
20
2.7
6.0
V
Standby Supply Current Conditions:
PWR_ON = L, STATUS = H, CLOCK_IN = H,
CS = H. All other logic inputs and outputs are open:
Vbat = 3.0 V
Vbat = 5.0 V
Ibatsb
20
3.0
8.0
15
mA
DC Operating Current (Figure
19)PWR_ON = H, CLOCK_IN = 0, CS = H, all CRD pins
unloaded
@ Vbat = 6.0 V, CRD_VCC = 5.0 V
@ Vbat = 3.6 V, CRD_VCC = 5.0 V
Ibatop
20
7.0
2.0
5.0
mA
Vbat Undervoltage DetectionHigh
Vbat Undervoltage DetectionLow
Vbat Undervoltage DetectionHysteresis
VbatLH
VbatLL
VbatHY
20
2.1
2.0
100
2.7
2.6
V
mV
Output Card Supply Voltage @ Icc = 55 mA
@ 2.70 V
vVbat v6.0 V
CRD_VCC = 3.0 V
CRD_VCC = 5.0 V
@ VbatLL < Vbat < 2.70 V
CRD_VCC = 5.0 V
Vcc
VC3H
VC5H
15
2.75
4.75
4.50
3.25
5.25
V
Output Card Supply Peak Current @ Vcc = 5.0 V
@ CRD_VCC = 5.0 V
@ CRD_VCC = 3.0 V
@ Vbat = 3.6 V, CRD_VCC = 5.0 V, Tamb < 65
°C
Iccp
15
55
65
mA
Output Current Limit Time Out
tdoff
15
4.0
ms
Output Over Current Limit
Iccov
15
100
mA
Output Dynamic Peak Current @ CRD_VCC = 3.0 V
or 5.0 V, Cout = 10
mF Ceramic XR7, Pulse Width
Iccd
15
100
mA
Battery StartUp Current
@ CRD_VCC = 3.0 V, 25
°C v TA v+ 85°C
@ CRD_VCC = 5.0 V, 25
°CvTAv+ 85°C
Iccst
20
140
300
mA
Output Card Supply Voltage Ripple @ Lout = 22
mH,
Cout 1 = 10
mF, Cout 2 = 100 nF, Vbat = 3.6 V
Iout = 55 mA
CRD_VCC = 5.0 V
CRD_VCC = 3.0V
Vccrip
15
50
mV
Output Card Supply Turn On Time @ Lout = 22
mF,
Cout1 = 10
mF, Cout2 = 100 nF, Vbat = 2.7 V,
CRD_VCC = 5.0 V
VccTON
15
2.0
ms
Output Card Supply Shut Off Time @ Cout1 = 10
mF,
Ceramic, Vbat = 2.7 V, CRD_VCC = 5.0 V,
VccOFF < 0.4 V
VccTOFF
15
250
ms
DCDC Converter Operating Frequency
Fsw
18
600
kHz
Power Switch Drain/Source Resistor
RONS
18
1.9
2.2
W
Output Rectifier ON Resistor
ROND
15
2.8
3.4
W
5. Ceramic X7R, SMD types capacitors are mandatory to achieve the CRD_VCC specifications. When electrolytic capacitor is used, the
external filter must include a 100 nF, max 50 m
W ESR capacitor in parallel, to reduce both the high frequency noise and ripple to a minimum.
Depending upon the PCB layout, it might be necessary is to use two 6.8
mF/10 V/ceramic/X7R//SMD1206 in parallel, yielding an improved
CRD_VCC ripple over the temperature range.
6. According to ISO78163, paragraph 4.3.2.