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参数资料
型号： ORSO42G5-2BMN484I
厂商： Lattice Semiconductor Corporation
文件页数： 153/153页
文件大小： 0K
描述： IC TRANCEIVERS FPSC 680FPGAM
产品变化通告： Product Discontinuation 01/Aug/2011
标准包装： 60
系列： *
Lattice Semiconductor
ORCA ORSO42G5 and ORSO82G5 Data Sheet
99
30809 - AA
30819 - AB
30829 - AC
30839 - AD
30909 - BA
30919 - BB
30929 - BC
30939 - BD
[0]
RSVD
00
Reserved
—
[1]
OOF_xx
OOF_xx = 1 indicates OOF has been detected
in this link. If the corresponding alarm enable bit
has been set, a 1 on this bit will cause an alarm
Both
[2]
EX_SEQ_ERR_xx
Excessive Sequence Errors, EX_SEQ_ERR = 1
indicates that three consecutive cells containing
sequence errors have been detected in this link.
If the corresponding alarm enable bit has been
set, a 1 on this bit will cause an alarm.
Cell
[3]
SEQ_ERR_xx
Sequence Error, SEQ_ERR = 1 indicates that a
sequence error has been detected for a cell on
this link. If the corresponding alarm enable bit
has been set, a 1 on this bit will cause an alarm.
Cell
]4]
CELL_BIP_ERR_xx
Cell mode BIP Error, CELL_BIP_ERR = 1 indi-
cates that a BIP error has been detected in a
cell on the link. If the corresponding alarm
enable bit has been set, a 1 on this bit will cause
an alarm.
Cell
[5]
B1_ERR_xx
Bit Interleaved Parity Error, B1_ERR = 1 indi-
cates that a Section B1 error has been detected
on the link.If the corresponding alarm enable bit
has been set, a 1 on this bit will cause an alarm.
Both
[6]
RX_FIFO_OVRUN_xx
Receive FIFO Overrun, RX_FIFO_OVRUN_xx
= 1 indicates that the asynchronous RX FIFO
has detected an overrun condition. If the corre-
sponding alarm enable bit has been set, a 1 on
this bit will cause an alarm.
Cell
[7]
RDI_xx
Remote Defect Indication, RDI = 1 indicates that
a RDI has been detected on the link. If the cor-
responding alarm enable bit has been set, a 1
on this bit will cause an alarm
Both
3080A - AA
3081A - AB
3082A - AC
3083A - AD
3090A -BA
3091A - BB
3092A - BC
3093A - BD
[0:4]
RSVD
00
Reserved
—
[5]
STAT_CELL_ALIGN_ERR_xx
STAT_CELL_ALIGN_ERR_xx = 1 same as
CELL_ALIGN_ERR_xx except that a 1 on this
bit can NOT cause an interrupt
Cell
[6]
STAT_TX_URUN_ERR_xx
STAT_TX_URUN_ERR_xx = 1 same as
TX_URUN_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
[7]
STAT_TX_ORUN_ERR_xx
STAT_TX_ORUN_ERR_xx = 1 same as
TX_ORUN_ERR_xx except that a 1 on this bit
can NOT cause an interrupt
Cell
Table 35. Per-Channel Status Register Descriptions – ORSO82G5 (Continued)
(0x)
Absolute
Address
Bit
Name
Reset
Value
(0x)
Description
Mode
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相关代理商/技术参数
参数描述
ORSO42G5-3BM484C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-3BMN484C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 204 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
ORSO42G5-EV 功能描述:可编程逻辑 IC 开发工具 Eval Brd ORSO42G5 RoHS:否 制造商:Altera Corporation 产品:Development Kits 类型:FPGA 工具用于评估:5CEFA7F3 接口类型: 工作电源电压:
ORSO82G5 制造商:LATTICE 制造商全称:Lattice Semiconductor 功能描述:0.6 to 2.7 Gbps SONET Backplane Interface FPSCs
ORSO82G5-1BM680C 功能描述:FPGA - 现场可编程门阵列 10368 LUT 372 I/O RoHS:否 制造商:Altera Corporation 系列:Cyclone V E 栅极数量: 逻辑块数量:943 内嵌式块RAM - EBR:1956 kbit 输入/输出端数量:128 最大工作频率:800 MHz 工作电源电压:1.1 V 最大工作温度:+ 70 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-256
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