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参数资料
型号： ORT42G5-EV
厂商： Lattice Semiconductor Corporation
文件页数： 93/119页
文件大小： 0K
描述： BOARD EVAL ORT42G5/CABLE/ADAPTER
标准包装： 1
系列： ORCA® 4 系列
类型： FPGA
适用于相关产品： ORT42G5
所含物品： 板，线缆，电源
其它名称： ORT42G5EV
Lattice Semiconductor
ORCA ORT42G5 and ORT82G5 Data Sheet
75
Absolute Maximum Ratings
Stresses in excess of the absolute maximum ratings can cause permanent damage to the device. These are abso-
lute stress ratings only. Functional operation of the device is not implied at these or any other conditions in excess
of those given in the operations sections of this data sheet. Exposure to absolute maximum ratings for extended
periods can adversely affect device reliability.
The ORCA Series 4 FPSCs include circuitry designed to protect the chips from damaging substrate injection cur-
rents and to prevent accumulations of static charge. Nevertheless, conventional precautions should be observed
during storage, handling, and use to avoid exposure to excessive electrical stress.
Recommended Operating Conditions
SERDES Electrical and Timing Characteristics
Table 31. Absolute Maximum Ratings
Parameter
Symbol
Min.
Max.
Unit
Storage Temperature
TSTG
– 65
150
°C
Power Supply Voltage with Respect to Ground
VDD33
– 0.3
4.2
V
VDDIO
– 0.3
4.2
V
VDD15, VDD_ANA,
VDDGB
—
2.0
V
Input Signal with Respect to Ground
VIN
VSS – 0.3
VDDIO + 0.3
V
Signal Applied to High-impedance Output
—
VSS – 0.3
VDDIO + 0.3
V
Maximum Package Body (Soldering) Temperature
—
220
°C
Parameter
Symbol
Min.
Max.
Unit
Power Supply Voltage with Respect to Ground
1
VDD33
3.0
3.6
V
VDD15
1.425
1.575
V
Input Voltages
VIN
VSS – 0.3
VDDIO + 0.3
V
Junction Temperature
TJ
– 40
125
°C
SERDES Supply Voltage
VDD_ANA, VDDGB
1.425
1.575
V
SERDES CML I/O Supply Voltage
VDDIB, VDDOB
1.425
1.89
V
1. For FPGA Recommended Operating Conditions and Electrical Characteristics, see the Recommended Operating Conditions and Electri-
cal Characteristics tables in the ORCA Series 4 FPGA data sheet (OR4E04) and the ORCA Series 4 I/O Buffer Technical Note. FPSC
Standby Currents (IDDSB15 and IDDSB33) are tested with the Embedded Core in the powered down state.
Parameter
Conditions
Max.
1
Units
ORT82G5 Power
Dissipation
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 1.25 Gbit/s
195
mW
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 2.50 Gbit/s
210
mW
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 3.125 Gbit/s
225
mW
8b/10b Encoder/Decoder (per Channel)
50
mW
ORT42G5 Power
Dissipation
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 1.25 Gbit/s
265
mW
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 2.50 Gbit/s
275
mW
SERDES, MUX/DEMUX, Align FIFO and I/O (per channel), 3.125 Gbit/s
295
mW
8b/10b Encoder/Decoder (per Channel)
50
mW
1. With all channels operating, 1.575V supply.
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