参数资料
型号: P89LPC954FBD44,151
厂商: NXP Semiconductors
文件页数: 39/69页
文件大小: 0K
描述: IC 80C51 MCU FLASH 16K 44LQFP
标准包装: 160
系列: LPC900
核心处理器: 8051
芯体尺寸: 8-位
速度: 18MHz
连通性: I²C,SPI,UART/USART
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 40
程序存储器容量: 16KB(16K x 8)
程序存储器类型: 闪存
RAM 容量: 512 x 8
电压 - 电源 (Vcc/Vdd): 2.4 V ~ 3.6 V
数据转换器: A/D 8x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 44-LQFP
包装: 托盘
配用: 568-1759-ND - EMULATOR DEBUGGER/PROGRMMR LPC9X
其它名称: 568-7917
568-7917-ND
568-8269
935284303151
P89LPC954FBD44,151-ND
P89LPC954FBD44-S
P89LPC954FBD44-S-ND
P89LPC952_954_4
NXP B.V. 2008. All rights reserved.
Product data sheet
Rev. 04 — 24 July 2008
44 of 69
NXP Semiconductors
P89LPC952/954
8-bit microcontroller with 10-bit ADC
7.26 Flash program memory
7.26.1 General description
The P89LPC952/954 ash memory provides in-circuit electrical erasure and
programming. The ash can be erased, read, and written as bytes. The Sector and Page
Erase functions can erase any ash sector (1 kB) or page (64 bytes). The Chip Erase
operation will erase the entire program memory. ICP using standard commercial
programmers is available. In addition, IAP and byte-erase allows code memory to be used
for non-volatile data storage. On-chip erase and write timing generation contribute to a
user-friendly programming interface. The P89LPC952/954 ash reliably stores memory
contents even after 400,000 erase and program cycles. The cell is designed to optimize
the erase and programming mechanisms. The P89LPC952/954 uses VDD as the supply
voltage to perform the Program/Erase algorithms.
7.26.2 Features
Programming and erase over the full operating voltage range.
Byte erase allows code memory to be used for data storage.
Read/Programming/Erase using ISP, IAP, ICP, or two-wire serial debugger.
Internal xed boot ROM, containing low-level IAP routines available to user code.
Default loader providing ISP via the serial port, located in upper end of user program
memory.
Boot vector allows user-provided ash loader code to reside anywhere in the ash
memory space, providing exibility to the user.
Any ash program/erase operation in 2 ms.
Programming with industry-standard commercial programmers.
Programmable security for the code in the ash for each sector.
400,000 typical erase/program cycles for each byte.
20 year minimum data retention.
7.26.3 Flash organization
The program memory consists of eight/sixteen 1 kB sectors on the P89LPC952/954
devices. Each sector can be further divided into 64-byte pages. In addition to sector
erase, page erase, and byte erase, a 64-byte page register is included which allows from
1 to 64 bytes of a given page to be programmed at the same time, substantially reducing
overall programming time.
7.26.4 Using ash as data storage
The ash code memory array of this device supports individual byte erasing and
programming. Any byte in the code memory array may be read using the MOVC
instruction, provided that the sector containing the byte has not been secured (a MOVC
instruction is not allowed to read code memory contents of a secured sector). Thus any
byte in a non-secured sector may be used for non-volatile data storage.
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