参数资料
| 型号： | PI7C9X20404GPBNBE |
| 厂商： | Pericom |
| 文件页数： | 11/79页 |
| 文件大小： | 0K |
| 描述： | IC PCIE PACKET SWITCH 148LFBGA |
| 产品变化通告： | Product Discontinuation Notice 22/Jan/2010 |
| 标准包装： | 189 |
| 系列： | GreenPacket™ |
| 应用： | 封装开关，4 端口/4 线道 |
| 接口： | PCI Express |
| 封装/外壳： | 148-LFBGA |
| 供应商设备封装： | 148-LFBGA（12x12） |
| 包装： | 托盘 |
| 安装类型： | 表面贴装 |
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PI7C9X20404GP
4Port-4Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 19 of 79
June 2009 – Revision 1.6
Pericom Semiconductor
5.5
TC/VC MAPPING
The 3-bit TC field defined in the header identifies the traffic class of the incoming packets. To enable the
differential service, a TC/VC mapping table at destination port that is pre-programmed by system software or
EEPROM pre-load is utilized to cast the TC labeled packets into the desired virtual channel. Note that TC0 traffic is
mapped into VC0 channel by default. After the TC/VC mapping, the receive block dispatches the incoming request,
completion, or data into the appropriate VC0 and VC1 queues.
5.6
QUEUE
In PCI Express, it defines six different packet types to represent request, completion, and data. They are respectively
Posted Request Header (PH), Posted Request Data payload (PD), Non-Posted Request Header (NPH), Non-Posted
Data Payload (NPD), Completion Header (CPLH) and Completion Data payload (CPLD). Each packet with
different type would be put into a separate queue in order to facilitate the following ordering processor. Since NPD
usually contains one DW, it can be merged with the corresponding NPH into a common queue named NPHD.
Except NPHD, each virtual channel (VC0 or VC1) has its own corresponding packet header and data queue. When
only VC0 is needed in some applications, VC1 can be disabled and its resources assigned to VC0 by asserting
VC1_EN (Virtual Channel 1 Enable) to low.
5.6.1
PH
PH queue provides TLP header spaces for posted memory writes and various message request headers. Each header
space occupies sixteen bytes to accommodate 3 DW or 4 DW headers. There are two PH queues for VC0 and VC1
respectively.
5.6.2
PD
PD queue is used for storing posted request data. If the received TLP is of the posted request type and is determined
to have payload coming with the header, the payload data would be put into PD queue. There are two PD queues for
VC0 and VC1 respectively.
5.6.3 NPHD
NPHD queue provides TLP header spaces for non-posted request packets, which include memory read, IO read, IO
write, configuration read, and configuration write. Each header space takes twenty bytes to accommodate a 3-DW
header, s 4-DW header, s 3-WD header with 1-DW data, and a 4-DW header with 1-DW data. There is only one
NPHD queue for VC0, since non-posted request cannot be mapped into VC1.
5.6.4 CPLH
CPLH queue provides TLP header space for completion packets. Each header space takes twelve bytes to
accommodate a 3-DW header. Please note that there is no 4-DW completion headers. There are two CPLH queues
for VC0 and VC1 respectively.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| PI7C9X20404SLCEVB | 制造商:Pericom Semiconductor Corporation 功能描述:PCIE 4 PORT SWITCH EVAL BOARD - Boxed Product (Development Kits) |
| PI7C9X20404SLCFDE | 功能描述:外围驱动器与原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| PI7C9X20404SLCFDEX | 功能描述:外围驱动器与原件 - PCI 4port 4lane PCIe Packet Switch RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| PI7C9X20505GPBNDE | 功能描述:外围驱动器与原件 - PCI 5port 5lane PCIe PacketSwitch RoHS:否 制造商:PLX Technology 工作电源电压: 最大工作温度: 安装风格:SMD/SMT 封装 / 箱体:FCBGA-1156 封装:Tray |
| PI7C9X20508GPANDE | 制造商:Pericom Semiconductor Corporation 功能描述:5-PORT, 8-LANE, GREENPACKET- PCIE PACKET SWITCH - Rail/Tube |
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