参数资料
型号: PI7C9X20404GPBNBE
厂商: Pericom
文件页数: 61/79页
文件大小: 0K
描述: IC PCIE PACKET SWITCH 148LFBGA
产品变化通告: Product Discontinuation Notice 22/Jan/2010
标准包装: 189
系列: GreenPacket™
应用: 封装开关,4 端口/4 线道
接口: PCI Express
封装/外壳: 148-LFBGA
供应商设备封装: 148-LFBGA(12x12)
包装: 托盘
安装类型: 表面贴装
PI7C9X20404GP
4Port-4Lane PCI Express Switch
GreenPacket
TM Family
Datasheet
Page 64 of 79
June 2009 – Revision 1.6
Pericom Semiconductor
BIT
FUNCTION
TYPE
DESCRIPTION
31:24
Port Arbitration
Table Offset
RO
It indicates the location of the Port Arbitration Table (n) as an offset from the
base address of the Virtual Channel Capability register in the unit of DQWD
(16 bytes).
Reset to 08h for Port Arbitration Table (1)
7.2.95
VC RESOURCE CONTROL REGISTER (1) – OFFSET 160h
BIT
FUNCTION
TYPE
DESCRIPTION
7:0
TC/VC Map
RW
(Exception
for bit0)
This field indicates the TCs that are mapped to the VC resource. Bit
locations within this field correspond to TC values. When the bits in this
field are set, it means that the corresponding TCs are mapped to the VC
resource. Bit 0 of this filed is read-only and must be set to “0” for the VC1.
The default value may be changed by SMBus or auto-loading from
EEPROM.
Reset to 00h.
15:8
Reserved
RO
Reset to 00h.
16
Load Port
Arbitration Table
RW
When set, the programmed Port Arbitration Table is applied to the
hardware. This bit always returns 0b when read.
Reset to 0b.
19:17
Port Arbitration
Select
RW
This field is used to configure the Port Arbitration by selecting one of the
supported Port Arbitration schemes. The permissible values for the
schemes supported by Switch are 000b, 011b and 100b at VC1, other value
than these written into this register will be treated as default.
Reset to 000b.
23:20
Reserved
RO
Reset to 0h.
26:24
VC ID
RW
This field assigns a VC ID to the VC resource.
Reset to 001b.
30:27
Reserved
RO
Reset to 0h.
31
VC Enable
RW
0b: it disables this Virtual Channel
1b: it enables this Virtual Channel
Reset to 0b.
7.2.96
VC RESOURCE STATUS REGISTER (1) – OFFSET 164h
BIT
FUNCTION
TYPE
DESCRIPTION
15:0
Reserved
RO
Reset to 0000h.
16
Port Arbitration
Table Status
RO
When set, it indicates that any entry of the Port Arbitration Table is written by
software. This bit is cleared when hardware finishes loading values stored in
the Port Arbitration Table after the bit of “Load Port Arbitration Table” is set.
Reset to 0b.
17
VC Negotiation
Pending
RO
When set, it indicates that the VC resource is still in the process of
negotiation. This bit is cleared after the VC negotiation is complete.
Reset to 0b.
31:18
Reserved
RO
Reset to 0.
7.2.97
VC ARBITRATION TABLE REGISTER – OFFSET 170h
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