参数资料
型号: RK80532KE056512
厂商: INTEL CORP
元件分类: 微控制器/微处理器
英文描述: 32-BIT, 2400 MHz, MICROPROCESSOR, CPGA604
封装: FLIP CHIP, MICRO, PGA2-604
文件页数: 16/102页
文件大小: 1464K
代理商: RK80532KE056512
20
Intel Xeon Processor with 533 MHz Front Side Bus at 2 GHz to 3.20 GHz
2.9
Asynchronous GTL+ Signals
The Intel Xeon Processor with 533 MHz Front Side Bus does not utilize CMOS voltage levels
on any signals that connect to the processor silicon. As a result, legacy input signals such as
A20M#, IGNNE#, INIT#, LINT0/INTR, LINT1/NMI, SLP#, and STPCLK# utilize GTL+ input
buffers. Legacy output FERR#/PBE# and other non-AGTL+ signals IERR#, THERMTRIP# and
PROCHOT# utilize GTL+ output buffers. All of these asynchronous GTL+ signals follow the same
DC requirements as AGTL+ signals, however the outputs are not driven high (during the logical 0-
to-1 transition) by the processor (the major difference between GTL+ and AGTL+). Asynchronous
GTL+ signals do not have setup or hold time specifications in relation to BCLK[1:0]. However, all
of the asynchronous GTL+ signals are required to be asserted for at least two BCLKs in order for
the processor to recognize them. See Table 10 for the DC specifications for the asynchronous
GTL+ signal groups.
2.10
Maximum Ratings
Table 5 lists the processor’s maximum environmental stress ratings. Functional operation at the
absolute maximum and minimum is neither implied nor guaranteed. The processor should not
receive a clock while subjected to these conditions. Functional operating parameters are listed in
the AC and DC tables. Extended exposure to the maximum ratings may affect device reliability.
Furthermore, although the processor contains protective circuitry to resist damage from static
electric discharge, one should always take precautions to avoid high static voltages or electric
fields.
1. This rating applies to any pin of the processor.
2. Contact Intel for storage requirements in excess of one year.
2.11
Processor DC Specifications
The processor DC specifications in this section are defined at the processor core (pads) unless
noted otherwise. See Section 5.1 for the processor pin listings and Section 5.2 for the signal
definitions. The voltage and current specifications for all versions of the processor are detailed in
Table 6. For platform planning refer to Figure 3. Notice that the graphs include Thermal Design
Power (TDP) associated with the maximum current levels. The DC specifications for the AGTL+
signals are listed in Table 8.
Table 5. Processor Absolute Maximum Ratings
Symbol
Parameter
Min
Max
Unit
Notes
TSTORAGE
Processor storage temperature
-40
85
°C
2
VCC
Any processor supply voltage with
respect to VSS
-0.3
1.75
V
1
VinAGTL+
AGTL+ buffer DC input voltage with
respect to VSS
-0.1
1.75
V
VinGTL+
Async GTL+ buffer DC input voltage
with respect to Vss
-0.1
1.75
V
IVID
Max VID pin current
5
mA
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