- 您现在的位置：买卖IC网 > PDF目录69323 > RM7965A-900UI (PMC-SIERRA INC) 64-BIT, 900 MHz, MICROPROCESSOR, PBGA256 PDF资料下载
参数资料
| 型号： | RM7965A-900UI |
| 厂商： | PMC-SIERRA INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 64-BIT, 900 MHz, MICROPROCESSOR, PBGA256 |
| 封装： | 27 X 27 MM, 1.62 MM HEIGHT, MO-192BAL-2, CSBGA-256 |
| 文件页数： | 19/60页 |
| 文件大小： | 508K |
| 代理商： | RM7965A-900UI |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页当前第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页
Downloaded
[controlled]
by
Venkatesh
Betageri
of
IHS
on
Wednesday,
12
January,
2011
02:34:04
AM
RM7965A-900UI 900 MHz 64-bit Microprocessor Data Sheet
Proprietary and Confidential to PMC-Sierra, Inc., and for its customers’ internal use.
26
Document No.: PMC-2100294, Issue 2
4.17 Instruction TLB
The E9000 uses a 4-entry instruction TLB (ITLB). The ITLB offers the following advantages:
Minimizes contention for the JTLB
Eliminates the critical path of translating through a large associative array
Allows instruction address and data address translations to occur in parallel
Saves power
Each ITLB entry maps a 4 KB page. The ITLB improves performance by allowing instruction
address translation to occur in parallel with data address translation. When a miss occurs on an
instruction address translation by the ITLB, the least-recently used ITLB entry is filled from the
JTLB. The operation of the ITLB is completely transparent to the user.
4.18 Data TLB …
The E9000 uses a 4-entry data TLB (DTLB) for the same reasons cited above for the ITLB.
Each DTLB entry maps a 4 KB page. The DTLB improves performance by allowing data
address translation to occur in parallel with instruction address translation. When a miss occurs
on a data address translation, the DTLB is filled from the JTLB. The DTLB refill is pseudo-
LRU; the least recently used entry of the least recently used pair of entries is filled. The
operation of the DTLB is completely transparent to the user.
4.19 Interrupt Handling
In order to provide better real time interrupt handling, the RM7965A provides 10 external
hardware interrupts, each of which can be separately prioritized and separately vectored.
The performance counter is also a hardware interrupt source using INT13. Historically in the
MIPS architecture, interrupt 7 (INT7) was used as the Timer Interrupt. The RM7965A provides
a separate interrupt, INT12, for this purpose, thereby releasing INT7 for use as a pure external
interrupt.
All interrupts (INT[13:0]), the Performance Counter, and the Timer, have corresponding
interrupt mask bits, IM[13:0], and interrupt pending bits, IP[13:0], in the Status, Interrupt
Control, and Cause registers. The bit assignments for the Interrupt Control and Cause registers
product family and is not shown.)
Table 8 Cause Register
31
30
29:28
27
26
25
24
23:8
7
6:2
0:1
BD
0
CE
0
W2
W1
IV
IP[15:0]
0
EXC
0
相关PDF资料 |
PDF描述 |
|---|---|
| RN80532KC0371M | 1900 MHz, MICROPROCESSOR, CPGA603 |
| RN80532KC0411M | 2000 MHz, MICROPROCESSOR, CPGA603 |
| RN80532KC0412M | 2000 MHz, MICROPROCESSOR, CPGA603 |
| RN80532KC041512 | 32-BIT, 2000 MHz, MICROPROCESSOR, CPGA603 |
| RP0352 | GRAPHICS PROCESSOR, PQFP80 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| RM79LH1660-40 | 制造商:Esna Technologies 功能描述: |
| RM7M70202068362092LLP1 | 制造商:3M Electronic Products Division 功能描述:CABLE ASSEMBLY |
| RM7M70202068362200LLP1 | 制造商:3M Electronic Products Division 功能描述:CABLE ASSY |
| RM7M70202068362292LLP1 | 制造商:3M Electronic Products Division 功能描述:CABLE ASSEMBLY |
| RM8 | 制造商:SUMIDA 制造商全称:Sumida Corporation 功能描述:Automotive HID Transformer |
发布紧急采购，3分钟左右您将得到回复。