参数资料
型号: SI2401FS10-EVB
厂商: Silicon Laboratories Inc
文件页数: 27/76页
文件大小: 0K
描述: BOARD EVAL SI2401 UART INTERFACE
标准包装: 1
系列: ISOmodem®
主要目的: 电信,调制解调器
嵌入式:
已用 IC / 零件: SI2401
主要属性: 双路 RJ-11 连接至电话线路,音频连接器
次要属性: RS-232,TTL 串行和 USB 接口
已供物品: 板,调制解调器,电源
相关产品: 336-1095-ND - IC ISOMODEM SYSTEM-SIDE 16SOIC
其它名称: 336-1167
Si2401
Rev. 1.0
33
Table 19 defines the relationship between SE5, SE6, and SE8.
6.2. Call Progress Filters
The programmable call progress filter coefficients are located in DSP address locations 0x0010 through 0x0023.
There are two independent 4th order filters, A and B, each consisting of two biquads, for a total of 20 coefficients.
Coefficients are 14 bits (–8192 to 8191) and are interpreted as, for example, b0 = value/4096, thus giving a floating
point value of approximately –2.0 to 2.0. Output of each biquad is calculated as follows:
The output of the filters is input to an energy detector and then compared to a fixed threshold with hysteresis (DSP
register CPDL). Defaults shown are a bandpass filter from 290–630 Hz (–3 dB). These registers are located in the
DSP and, thus, must be written in the same manner described in “DSP Registers”.
The filters may be configured in either parallel or cascade through SE6[6] (CPCD) with SE8 = 0x02, and the output
of filter B may be squared by selecting SE6[7] (CPSQ) = 1. Figure 5 shows a block diagram of the call progress
filter structure.
Table 19. SE5, SE6, and SE8 Relationship
SE8
SE6
SE5
R/W
Name
Description
Name
Description
0x00
W
DADH
DSP register address bits [15:8]
DADL
DSP register address bits [7:0]
0x01
W
DDH
DSP register data bits [15:8]
DDL
DSP register data bits [7:0]
0x02
R
DSP1
7 = DSP data available
6 = Tone detected
5=Reserved
4:0 = Tone type
0x02
W
DSP3
7 = Enable squaring function
6 = Call progress cascade disable
5=Reserved
4 = User tone 3 and 4 reporting
3 = User tone 1 and 2 reporting
2 = V.23 tone reporting
1 = Answer tone reporting
0 = DTMF tone reporting
DSP2
7 = Reserved
6:3 = DTMF tone to transmit
2:0 = Tone type
Table 20. Call Progress Filters
DSP Register
Address
Coefficient
Default (dec)
0x0010
A1_k0
256
0x0011
A1_b1
–8184
0x0012
A1_b2
4096
0x0013
A1_a1
7737
0x0014
A1_a2
–3801
0x0015
A2_k0
1236
wn
[]
k0
x n
[]
×
a1
w n
1
[]
×
a2
w n
2
[]
×
++
=
yn
[]
wn
[] b1 w n 1
[]
×
b2
w n
2
[]
×
++
=
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