参数资料
型号: SI2401FS10-EVB
厂商: Silicon Laboratories Inc
文件页数: 32/76页
文件大小: 0K
描述: BOARD EVAL SI2401 UART INTERFACE
标准包装: 1
系列: ISOmodem®
主要目的: 电信,调制解调器
嵌入式:
已用 IC / 零件: SI2401
主要属性: 双路 RJ-11 连接至电话线路,音频连接器
次要属性: RS-232,TTL 串行和 USB 接口
已供物品: 板,调制解调器,电源
相关产品: 336-1095-ND - IC ISOMODEM SYSTEM-SIDE 16SOIC
其它名称: 336-1167
Si2401
38
Rev. 1.0
S37
0x37
CDR
Carrier detect return. Minimum length of time that a carrier must
return and be detected in order to be recognized after a carrier
loss is detected
(5/3 ms units).
0x20
S39
0x39
CDT
Carrier detect timeout. Amount of time modem waits for carrier
detect before aborting call (1 second units).
0x3C
S3A
0x3A
ATD
Delay between going off-hook and answer tone generation when
in answer mode (53.33 ms units).
0x29
S3C
0x3C
CIDG
This is a bit-mapped register.*
0x01
S62
0x62
RC
This is a bit-mapped register.*
0x41
S82
0x82
IST
This is a bit-mapped register.*
0x08
SDB
0xDB
LVS
Line Voltage Status. Eight bit signed, 2s complement number
representing the tip-ring voltage. Each bit represents 1 volt.
Polarity of the voltage is represented by the MSB (sign bit).
0000_0000 = Measured voltage is < 3 V.
SDF
0xDF
DGSR
This is a bit-mapped register.*
0x0C
SE0
0xE0
CF1
This is a bit-mapped register.*
0x22
SE1
0xE1
GPIO1
This is a bit-mapped register.*
0x0E
SE2
0xE2
GPIO2
This is a bit-mapped register.*
0x00
SE3
0xE3
GPD
This is a bit-mapped register.*
SE4
0xE4
CF5
This is a bit-mapped register.*
0x00
SE5
0xE5
DADL
(SE8 = 0x00) Write only definition. DSP register address lower
bits [7:0].*
SE5
0xE5
DDL
(SE8 = 0x01) Write only definition. DSP data word lower bits
[7:0].*
SE5
0xE5
DSP1
(SE8 = 0x02) Read only definition. This is a bit-mapped register.1
SE5
0xE5
DSP2
(SE8 = 0x02) Write only definition. This is a bit-mapped register.1
SE6
0xE6
DADH
(SE8 = 0x00) Write only definition. DSP register address upper
bits [15:8].
SE6
0xE6
DDH
(SE8 = 0x01) Write only definition. DSP data word upper bits
[13:8]
SE6
0xE6
DSP3
(SE8 = 0x02) Write only definition. This is a bit-mapped register.1
SE8
0xE8
DSPR4
Set the mode to define E5 and E6 for low-level DSP control.
SEB
0xEB
TPD
This is a bit-mapped register.*
0x00
Table 21. S-Register Summary (Continued)
“S”
Register
Address
(hex)
Name
Function
Reset
*Note:
These registers are explained in detail in the following section.
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