参数资料
型号: ST72F652R4T1
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64
封装: 14 X 14 MM, TQFP-64
文件页数: 148/160页
文件大小: 974K
代理商: ST72F652R4T1
ST7265
88/160
11.6 PWM/BRM GENERATOR (DAC)
11.6.1 Introduction
This PWM/BRM peripheral includes a 6-bit Pulse
Width Modulator (PWM) and a 4-bit Binary Rate
Multiplier (BRM) Generator. It allows the digital to
analog conversion (DAC) when used with external
filtering.
Note: The number of PWM and BRM channels
available depends on the device. Refer to the de-
vice pin description and register map.
11.6.2 Main Features
s
Fixed frequency: fCPU/64
s
Resolution: T
CPU
s
Steps of V
DD/2
10 (5mV if V
DD=5V)
11.6.3 Functional Description
The 10 bits of the 10-bit PWM/BRM are distributed
as 6 PWM bits and 4 BRM bits. The generator con-
sists of a 10-bit counter (common for all channels),
a comparator and the PWM/BRM generation logic.
PWM Generation
The counter increments continuously, clocked at
internal CPU clock. Whenever the 6 least signifi-
cant bits of the counter (defined as the PWM coun-
ter) overflow, the output level for all active chan-
nels is set.
The state of the PWM counter is continuously
compared to the PWM binary weight for each
channel, as defined in the relevant PWM register,
and when a match occurs the output level for that
channel is reset.
This Pulse Width modulated signal must be fil-
tered, using an external RC network placed as
close as possible to the associated pin. This pro-
vides an analog voltage proportional to the aver-
age charge passed to the external capacitor. Thus
for a higher mark/space ratio (high time much
greater than low time) the average output voltage
is higher. The external components of the RC net-
work should be selected for the filtering level re-
quired for control of the system variable.
Each output may individually have its polarity in-
verted by software, and can also be used as a log-
ical output.
Figure 50. PWM Generation
COUNTER
63
COMPARE
VALUE
OVERFLOW
000
t
PWM OUTPUT
t
T
CPU x64
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