- 您现在的位置：买卖IC网 > PDF目录98147 > STE10/100E (STMICROELECTRONICS) 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 PDF资料下载
参数资料
| 型号： | STE10/100E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封装： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, QFP-128 |
| 文件页数： | 2/66页 |
| 文件大小： | 396K |
| 代理商： | STE10/100E |
第1页当前第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页
STE10/100A
10/66
29
SMA
Status Master Abort.
1: means that STE10/100A received a master abort and has
terminated a master transaction.
0
R/W
28
STA
Status Target Abort.
1: means that STE10/100A received a target abort and has
terminated a master transaction.
0
R/W
27
---
Reserved.
26, 25
SDST
Status Device Select Timing. Indicates the timing of the chip’s
assertion of device select.
01: indicates a medium assertion of DEVSEL#
01
R/O
24
SDPR
Status Data Parity Report.
1: when three conditions are met:
a. STE10/100A asserted parity error (PERR#) or it detected
parity error asserted by another device.
b. STE10/100A is operating as a bus master.
c. STE10/100A’s parity error response bit (bit 6 of CR1) is
enabled.
0
R/W
23
SFBB
Status Fast Back-to-Back
Always 1, since STE10/100A has the ability to accept fast
back to back transactions.
1
R/O
22~21
---
Reserved.
20
NC
New Capabilities. Indicates whether the STE10/100A provides
a list of extended capabilities, such as PCI power
management.
1: the STE10/100A provides the PCI management function
0: the STE10/100A doesn’t provide New Capabilities.
Same as
bit 19 of
CSR18
RO
19~ 9
---
Reserved.
8
CSE
Command System Error Response
1: enable system error response. The STE10/100A will assert
SERR# when it finds a parity error during the address phase.
1
R/W
7
---
Reserved.
6
CPE
Command Parity Error Response
0: disable parity error response. STE10/100A will ignore any
detected parity error and keep on operating. Default value is
0.
1: enable parity error response. STE10/100A will assert
system error (bit 13 of CSR5) when a parity error is
detected.
0
R/W
5~ 3
---
Reserved.
2
CMO
Command Master Operation Ability
0: disable the STE10/100A bus master ability.
1: enable the PCI bus master ability. Default value is 1 for
normal operation.
1
R/W
1
CMSA
Command Memory Space Access
0: disable the memory space access ability.
1: enable the memory space access ability.
1
R/W
Table 4. Configuration Registers Descriptions
Bit #
Name
Descriptions
Default Val
RW Type
相关PDF资料 |
PDF描述 |
|---|---|
| STEL-1173/CM | 8-BIT, DSP-NUM CONTROLLED OSCILLATOR, PQCC44 |
| STEL-1375A+80 | SPECIALTY MICROPROCESSOR CIRCUIT, DIP35 |
| STEL-1376 | SPECIALTY MICROPROCESSOR CIRCUIT, DIP65 |
| STEL-1377Q | SPECIALTY MICROPROCESSOR CIRCUIT, DIP63 |
| STK1390-5S25I | 0 TIMER(S), REAL TIME CLOCK, PDSO32 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| STE101P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:10/100 Fast ethernet 3.3V transceiver |
| STE-1042609RFRC | 功能描述:MAGNET ROUND AXIAL CHASSIS MNT 制造商:steute wireless 系列:- 零件状态:在售 形状:圆形 磁化:轴向 材料:- 表面:- 等级:- 高斯强度:- 尺寸:0.886" 直径 x 0.335" 高（22.50mm x 8.50mm） 工作温度:- 标准包装:1 |
| STE10A | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:PCI 10/100 Ethernet controller with integrated PHY (3.3V) |
| STE10-BOARD | 功能描述:以太网开发工具 Eval Board for STE10 RoHS:否 制造商:Micrel 产品:Evaluation Boards 类型:Ethernet Transceivers 工具用于评估:KSZ8873RLL 接口类型:RMII 工作电源电压: |
| STE110NA20 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:N - CHANNEL ENHANCEMENT MODE FAST POWER MOS TRANSISTOR |
发布紧急采购，3分钟左右您将得到回复。