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参数资料
| 型号： | STE10/100E |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128 |
| 封装： | 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, QFP-128 |
| 文件页数： | 51/66页 |
| 文件大小： | 396K |
| 代理商： | STE10/100E |
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STE10/100A
s
Network Device Class, Draft proposal v0.9, October 1996
s
Compatibility with ACPI, Rev 1.0, December 22, 1996
s
Compatibility with PCI Bus Power Management Interface Specification, Rev 1.0, January 6, 1997
s
Compatibility with AMD Magic Packet Technology.
6.9.1 Power States
s
DO (Fully On)
In this state the STE10/100A operates with full functionality and consumes normal power. While in the
D0 state, if the PCI clock is lower than 16MHz, the STE10/100A may not receive or transmit frames
properly.
s
D1, D2, and D3hot
In these states, the STE10/100A doesn’t respond to any accesses except configuration space and full
function context in place. The only network operation the STE10/100A can initiate is a wake-up event.
s
D3cold (Power Removed)
In this state all function context is lost. When power is restored, a PCI reset must be asserted and the
function will return to D0.
s
D3hot (Software Visible D3)
When the STE10/100A is brought back to D0 from D3hot the software must perform a full initialization.
The STE10/100A in the D3hot state responds to configuration cycles as long as power and clock are
supplied. This requires the device to perform an internal reset and return to a power-up reset condition
without the RST# pin asserted.
Table 13. Power Stage
Device
State
PCI Bus
State
Function
Context
Clock
Power
Supported
Actions to
Function
Supported
Actions from
Function
D0
B0
Full function context in
place
Full speed
Full
power
Any PCI
transaction
Any PCI
transaction or
interrupt
D1
B0, B1
Configuration
maintained. No Tx and
Rx except wake-up
events
Stopped to
Full speed
PCI configuration
access
Only wake-up
events
D2
B0, B1,
B2
Configuration
maintained. No Tx and
Rx
Stopped to
Full speed
PCI configuration
access(B0, B1)
D3hot
B0, B1,
B2
Configuration lost, full
initialization required
upon return to D0
Stopped to
Full speed
PCI configuration
access(B0, B1)
D3cold
B3
All configuration lost.
Power-on defaults in
place on return to D0
No clock
No
power
Power-on reset
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