参数资料
型号: STE10/100E
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128
封装: 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, QFP-128
文件页数: 65/66页
文件大小: 396K
代理商: STE10/100E
STE10/100A
8/66
5.0 REGISTERS AND DESCRIPTORS DESCRIPTION
There are three kinds of registers within the STE10/100A: STE10/100A configuration registers, PCI control/sta-
tus registers, and Transceiver control/status registers.
The STE10/100A configuration registers are used to initialize and configure the STE10/100A and for identifying
and querying the STE10/100A.
The PCI control/status registers are used to communicate between the host and STE10/100A. The host can
initialize, control, and read the status of the STE10/100A through mapped I/O or memory address space.
The STE10/100A contains 11 16-bit registers to supported Transceiver control and status. They include 7 basic
registers which are defined according to clause 22 “Reconciliation Sub-layer and Media Independent Interface”
and clause 28 “Physical Layer link signaling for 10 Mb/s and 100 Mb/s Auto-Negotiation on twisted pair” of the
IEEE802.3u standard. In addition, 4 special registers are provided for advanced chip control and status.
The STE10/100A also provides receive and transmit descriptors for packet buffering and management.
5.1 STE10/100A Configuration Registers
An STE10/100A software driver can initialize and configure the chip by writing its configuration registers. The
contents of configuration registers are set to their default values upon power-up or whenever a hardware reset
occurs, but their settings remain unchanged whenever a software reset occurs. The configuration registers are
byte, word, and double word accessible.
Table 2. STE10/100A configuration registers list
Offset
Index
Name
Descriptions
00h
CR0
LID
Loaded device ID and vendor ID
04h
CR1
CSC
Configuration Status and Command
08h
CR2
CC
Class Code and revision number
0ch
CR3
LT
Latency Timer
10h
CR4
IOBA
IO Base Address
14h
CR5
MBA
Memory Base Address
2ch
CR11
SID
Subsystem ID and vendor ID
30h
CR12
BRBA
Boot ROM Base Address (ROM size = 128KB)
34h
CR13
CP
Capability Pointer
3ch
CR15
CINT
Configuration Interrupt
40h
CR16
DS
driver space for special purpose
80h
CR32
SIG
Signature of STE10/100A
c0h
CR48
PMR0
Power Management Register 0
c4h
CR49
PMR1
Power Management Register 1
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