参数资料
型号: STE10/100E
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 1 CHANNEL(S), 100M bps, LOCAL AREA NETWORK CONTROLLER, PQFP128
封装: 14 X 20 MM, 2.70 MM HEIGHT, PLASTIC, QFP-128
文件页数: 56/66页
文件大小: 396K
代理商: STE10/100E
STE10/100A
6/66
21
TRDY#
I/O
Target device is ready to begin data transaction
22
DEVSEL#
I/O
Device select. Indicates that a PCI target device address has been decoded
23
STOP#
I/O
PCI target device request to the PCI master to stop the current transaction
24
PERR#
I/O
Data parity error detected, driven by the device receiving data
25
SERR#
O/D
Address parity error
26
PAR
I/O
Parity. Even parity computed for AD[31:0] and C/BE[3:0]; master drives PAR for
address and write data phase, target drives PAR for read data phase
BootROM/EEPROM Interface
56~59
61~66
80~86
87
BrA0~3
BrA4~9
BrA10~15
BrA16/
LED M2 -
Fd/Col
I/O
ROM data bus
Provides up to 128kB EPROM or Flash-ROM application space.
This pin can be programmed as mode 2 LED display for Full Duplex or Collision
status. It will be driven (LED on) continually when a full duplex configuration is
detected, or it will be driven at a 20 Hz blinking frequency when a collision status
is detected in the half duplex configuration.
67~71
72
73
74
BrD0~4
BrD5/EDO
BrD6/EDI
BrD7/ECK
O
O/I
O/O
BootROM data bus (0~7)
EDO: Data output of serial EEPROM, data input to STE10/100A
EDI:Data input to serial EEPROM, data output from STE10/100A
ECK:Clock input to serial EEPROM, sourced by STE10/100A
76
EECS
O
Chip Select of serial EEPROM
77
BrCS#
O
BootROM Chip Select
78
BrOE#
O
BootROM Read Output Enable for flash ROM application
79
BrWE#
O
BootROM Write Enable for flash ROM application.
Physical Interface
98
X1
I
25 MHz reference clock input for Physical portion. When an external 25 MHz
crystal is used, this pin will be connected to one of its terminals, and X2 will be
connected to the other terminal. If an external 25 MHz oscillator is used, then this
pin will be connected to the oscillator’s output pin.
97
X2
O
25 MHz reference clock output for Physical portion. When an external 25MHz
crystal is used, this pin will be connected to one of the crystal terminals (see X1,
above). If an external clock source is used, then this pin should be left open.
107,109
TX+, TX-
O
The differential Transmit outputs of 100BASE-TX or 10BASE-T, these pins
connect directly to Magnetic.
105,104
RX+, RX-
I
The differential Receive inputs of 100BASE-TX or 10BASE-T, these pins connect
directly from Magnetic.
101
Iref
O
Reference Resistor connecting pin for reference current, directly connects a 5K
Ohm
± 1% resistor to Vss.
Table 1. Pin Description
Pin No.
Name
Type
Description
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