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参数资料
| 型号： | STPCE1EEBC |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 外设及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA388 |
| 封装： | PLASTIC, BGA-388 |
| 文件页数： | 12/87页 |
| 文件大小： | 1426K |
| 代理商： | STPCE1EEBC |
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Obsolete
Product(s)
- Obsolete
Product(s)
2/87
Release 1.3 - January 29, 2002
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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X86 Processor core
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Fully static 32-bit 5-stage pipeline, x86
processor fully PC compatible.
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Can access up to 4GB of external memory.
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8KByte unified instruction and data cache
with write back and write through capability.
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Parallel processing integral floating point unit,
with automatic power down.
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Clock core speeds up to of 100 MHz in x1
clock mode and 133MHz in x2 mode.
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Fully static design for dynamic clock control.
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Low power and system management modes.
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SDRAM Controller
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64-bit data bus.
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Up to 100MHz SDRAM clock speed.
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Supports up to 128 MB system memory.
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Supports 16-, 64- and 128-Mbit memories.
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Supports up to 4 memory banks.
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Supports buffered, non buffered, registered
DIMMs
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4-line write buffers for CPU to DRAM and PCI
to DRAM cycles.
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4-line read prefetch buffers for PCI masters.
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Programmable latency
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Programmable timing for DRAM parameters.
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Supports -8, -10, -12, -13, -15 memory parts
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Supports memory hole between 1MB and
8MB for PCI/ISA busses.
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PCI Controller
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Compliant with PCI 2.1 specification.
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Integrated PCI arbitration interface. Up to 3
masters can connect directly. External logic
allows for greater than 3 masters.
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Translation of PCI cycles to ISA bus.
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Translation of ISA master initiated cycle to
PCI.
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Support for burst read/write from PCI master.
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0.25X, 0.33X and 0.5X Host clock PCI clock.
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ISA master/slave
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Generates the ISA clock from either
14.318MHz oscillator clock or PCI clock
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Supports programmable extra wait state for
ISA cycles
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Supports I/O recovery time for back to back
I/O cycles.
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Fast Gate A20 and Fast reset.
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Supports the single ROM that C, D, or E.
blocks shares with F block BIOS ROM.
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Supports flash ROM.
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Supports ISA hidden refresh.
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Buffered DMA & ISA master cycles to reduce
bandwidth utilization of the PCI and Host
bus. NSP compliant.
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16-bit I/O decoding.
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Local Bus interface
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Multiplexed with ISA/DMA/Timer functions.
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High speed, low latency bus.
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Supports 32-bit Flash burst.
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16-bit data bus with word steering capability.
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Separate memory and I/O address spaces.
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Programmable timing (Host clock granularity)
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Supports 2 cachable banks of 16MB flash
devices with boot block shadowed to
0x000F0000.
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2 Programmable Flash/EPROM Chip Select.
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4 Programmable I/O Chip Select.
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2-level hardware key protection for Flash boot
block protection.
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24 bit address bus.
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EIDE Controller
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Compatible with EIDE (ATA-2).
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Backward compatibility with IDE (ATA-1).
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Supports up to 4 IDE devices
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Supports PIO and Bus Master IDE
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Concurrent channel operation (PIO & DMA
modes) - 4 x 32-Bit Buffer FIFO per channel
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Support for 11.1/16.6 MB/s, I/O Channel
Ready PIO data transfers.
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Bus Master with scatter/gather capability.
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Multi-word DMA support for fast IDE drives.
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Individual drive timing for all four IDE devices.
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Supports both legacy & native IDE modes.
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Supports hard drives larger than 528MB.
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Support for CD-ROM and tape peripherals.
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Integrated Peripheral Controller
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2X8237/AT compatible 7-channel DMA
controller.
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2X8259/AT compatible interrupt Controller.
16 interrupt inputs - ISA and PCI.
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Three 8254 compatible Timer/Counters.
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Co-processor error support logic.
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Supports external RTC.
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Power Management
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Four power saving modes: On, Doze,
Standby, Suspend.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| STPCE1EEBI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDBC | 制造商:STMicroelectronics 功能描述:X86 GENERAL PURPOSE CONTROLLER - Bulk |
| STPCE1HDBI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microprocessor |
| STPCE1HEBC | 功能描述:微处理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
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