- 您现在的位置：买卖IC网 > PDF目录69397 > STPCE1EEBC (STMICROELECTRONICS) MULTIFUNCTION PERIPHERAL, PBGA388 PDF资料下载
参数资料
| 型号： | STPCE1EEBC |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 外设及接口 |
| 英文描述： | MULTIFUNCTION PERIPHERAL, PBGA388 |
| 封装： | PLASTIC, BGA-388 |
| 文件页数： | 71/87页 |
| 文件大小： | 1426K |
| 代理商： | STPCE1EEBC |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页当前第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页
Obsolete
Product(s)
- Obsolete
Product(s)
DESIGN GUIDELINES
Release 1.3 - January 29, 2002
73/87
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
memory clock input (MCLKI) and any other
component
using
the
memory
clock
are
individually driven from a low skew clock driver
with matched routing lengths. In other words, all
clock line lengths that go from the buffer to the
memory chips (MCLKx) and from the buffer to the
STPC (MCLKI) must be identical.
This is shown in Figure 6-18.
The maximum skew between pins for this part is
250ps. The important factors for the clock buffer
are a consistent drive strength and low skew
between the outputs. The delay through the buffer
is not important so it does not have to be a zero
delay PLL type buffer. The trace lengths from the
clock driver to the DIMM CKn pins should be
matched exactly. Since the propagation speed
can vary between PCB layers, the clocks should
be routed in a consistent way. The routing to the
STPC memory input should be longer by 75 mm to
compensate for the extra clock routing on the
DIMM. Also a 20 pF capacitor should be placed as
near as possible to the clock input of the STPC to
compensate for the DIMM’s higher clock load. The
impedance of the trace used for the clock routing
should be matched to the DIMM clock trace
impedance (60-75 ohms)
.To minimise crosstalk
the clocks should be routed with spacing to
adjacent tracks of at least twice the clock trace
width. For designs which use SDRAMs directly
mounted on the motherboard PCB all the clock
trace lengths should be matched exactly.
Figure 6-17. DIMM placement
DIMM2
DIMM1
STPC
35mm
15mm
10mm
116mm
SDRAM I/F
Figure 6-18. Clock Routing
MCLKO
DIMM CKn input
STPC MCLKI
DIMM CKn input
Low skew clock driver:
L
L+75mm*
20pF
* No additional 75mm when SDRAM directly soldered on board
相关PDF资料 |
PDF描述 |
|---|---|
| STR631FV0T6 | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP100 |
| STR636FV2T6 | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP100 |
| STR630FZ2H6 | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PBGA144 |
| STR630FZ2T6 | 32-BIT, FLASH, 36 MHz, RISC MICROCONTROLLER, PQFP144 |
| STR710FR1T6 | 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP64 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| STPCE1EEBI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDBC | 制造商:STMicroelectronics 功能描述:X86 GENERAL PURPOSE CONTROLLER - Bulk |
| STPCE1HDBI | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:X86 Core General Purpose PC Compatible System - on - Chip |
| STPCE1HDC | 制造商:未知厂家 制造商全称:未知厂家 功能描述:Microprocessor |
| STPCE1HEBC | 功能描述:微处理器 - MPU 133MHz x86 SoC RoHS:否 制造商:Atmel 处理器系列:SAMA5D31 核心:ARM Cortex A5 数据总线宽度:32 bit 最大时钟频率:536 MHz 程序存储器大小:32 KB 数据 RAM 大小:128 KB 接口类型:CAN, Ethernet, LIN, SPI,TWI, UART, USB 工作电源电压:1.8 V to 3.3 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:FBGA-324 |
发布紧急采购，3分钟左右您将得到回复。