iv
Contents (Continued)
Section
Title
Page
2.15.3 16-Bit Mode
2–14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.15.4 Free-Run Mode
2–14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.15.5 Force Secondary Communication
2–14
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.15.6 Enable Analog Input Summing
2–15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.15.7 DAC Channel (sin x)/x Error Correction
2–15
. . . . . . . . . . . . . . . . . . . . . . . . . . .
2.16 Serial Communications
2–15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.16.1 Stand-Alone and Master-Mode Word Sequence and
Information Content During Primary and
Secondary Communications
2–15
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.16.2 Slave and Codec-Mode Word Sequence and
Information Content During Primary and
Secondary Communications
2–16
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.17 Request for Secondary Serial Communication and Phase Shift
2–17
. . . . . . . . . . . .
2.17.1 Initiating a Request
2–17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.17.2 Normal Combinations of Control
2–17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.17.3 Additional Control Options
2–17
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.18 Primary Serial Communications
2–18
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.18.1 Primary Serial Communications Data Format
2–19
. . . . . . . . . . . . . . . . . . . . . .
2.18.2 Data Format From DOUT During
Primary Serial Communications
2–19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.19 Secondary Serial Communications
2–19
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.19.1 Data Format to DIN During Secondary Serial Communications
2–19
. . . . . . .
2.19.2 Control Data-Bit Function in Secondary Serial Communication
2–19
. . . . . . .
2.20 Internal Register Format
2–20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.1 Pseudo-Register 0 (No-Op Address)
2–20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.2 Register 1 (A Register)
2–20
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.3 Register 2 (B Register)
2–21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.4 Register 3 (A
′ Register)
2–21
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.5 Register 4 (Amplifier Gain-Select Register)
2–22
. . . . . . . . . . . . . . . . . . . . . . . .
2.20.6 Register 5 (Analog Configuration Register)
2–22
. . . . . . . . . . . . . . . . . . . . . . . .
2.20.7 Register 6 (Digital Configuration Register)
2–23
. . . . . . . . . . . . . . . . . . . . . . . . .
2.20.8 Register 7 (Frame-Sync Delay Register)
2–23
. . . . . . . . . . . . . . . . . . . . . . . . . .
2.20.9 Register 8 (Frame-Sync Number Register)
2–24
. . . . . . . . . . . . . . . . . . . . . . . .
3
Specifications
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.1
Absolute Maximum Ratings Over Operating
Free-Air Temperature Range
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2
Recommended Operating Conditions
3–1
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.3
Electrical Characteristics Over Recommended Range of Operating
Free-Air Temperature, MCLK = 5.184 MHz, VDD = 5 V, Outputs
Unloaded, Total Device
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.4
Electrical Characteristics Over Recommended Range of Operating
Free-Air Temperature, VDD = 5 V, Digital I/O Terminals (DIN, DOUT, EOC,
FC0, FC1, FS, FSD, MCLK, M/S, SCLK)
3–2
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .