参数资料
型号: TLC320AC01CPMR
厂商: TEXAS INSTRUMENTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PQFP64
封装: PLASTIC, QFP-64
文件页数: 29/93页
文件大小: 601K
代理商: TLC320AC01CPMR
2–22
2.20.5
Register 4 (Amplifier Gain-Select Register)
The following command contains the amplifier gain-select register address with selection code for the
monitor output (DS05 – DS04), analog input (DS03 – DS02), and analog output (DS01 – DS00)
programmable gains.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
R/W
00
1
Control Bits
XX
**
Monitor output gain = squelch
Monitor output gain = 0 dB
Monitor output gain = – 8 dB
Monitor output gain = – 18 dB
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Analog input gain = squelch
Analog input gain = 0 dB
Analog input gain = 6 dB
Analog input gain = 12 dB
Analog output gain = squelch
Analog output gain = 0 dB
Analog output gain = – 6 dB
Analog output gain = – 12 dB
The default value of the monitor output gain is squelch, which corresponds to data bits DS05 and DS04 equal
to 00 (binary).
The default value of the analog input gain is 0 dB, which corresponds to data bits DS03 and DS02 equal
to 01 (binary).
The default value of the analog output gain is 0 dB, which corresponds to data bits DS01 and DS00 equal
to 01 (binary).
The default data value is shown below.
DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
0
00
01
1
2.20.6
Register 5 (Analog Configuration Register)
The following command loads the analog configuration register with the individual bit functions described
below.
DS15 DS14 DS13 DS12 DS11 DS10 DS09 DS08 DS07 DS06 DS05 DS04 DS03 DS02 DS01 DS00
R/W
00
01
1
Control Bits
XX
X
**
*
Must be set to 0
0
High-pass filter disabled
High-pass filter enabled
Enable analog input summing
X
1
Analog loopback enabled
00
Enables IN + and IN – (disables AUXIN + and AUXIN –)0
1
Enables AUXIN + and AUXIN – (disables IN + and IN –)
10
11
0
The default value of the high-pass-filter enable bit is 0, which places the high-pass filter in the signal path.
The default values of DS01 and DS00 are 0 and 1 which enables IN + and IN –.
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