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参数资料
| 型号： | W25Q16DWZPIP |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 16M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 6 X 5 MM, GREEN , PLASTIC, WSON-8 |
| 文件页数： | 26/83页 |
| 文件大小： | 1268K |
| 代理商： | W25Q16DWZPIP |
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W25Q16DW
- 32 -
10.2.15 Fast Read Dual I/O (BBh)
The Fast Read Dual I/O (BBh) instruction allows for improved random access while maintaining two IO
pins, IO0 and IO1. It is similar to the Fast Read Dual Output (3Bh) instruction but with the capability to input
the Address bits (A23-0) two bits per clock. This reduced instruction overhead may allow for code
execution (XIP) directly from the Dual SPI in some applications.
Fast Read Dual I/O with “Continuous Read Mode”
The Fast Read Dual I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in Figure 14a. The
upper nibble of the (M7-4) controls the length of the next Fast Read Dual I/O instruction through the
inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t care
(“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out clock.
If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Fast Read Dual I/O instruction (after /CS is
raised and then lowered) does not require the BBh instruction code, as shown in Figure 14b. This reduces
the instruction sequence by eight clocks and allows the Read address to be immediately entered after /CS
is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next instruction (after
/CS is raised and then lowered) requires the first byte instruction code, thus returning to normal operation.
It is recommended to input FFFFh on IO0 for the next instruction (16 clocks), to ensure M4 = 1 and return
the device to normal operation.
/CS
CLK
DI
(IO
0)
DO
(IO
1)
Mode 0
Mode 3
0
1
2
3
4
5
6
7
Instruction (BBh)
8
9
10
12
13
14
24
25
26
27
28
29
30
31
6
4
2
0
*
23
/CS
CLK
DI
(IO
0)
DO
(IO
1)
0
32
33
34
35
36
37
38
39
7
5
3
1
*
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
**
IOs switch from
Input to Output
6
7
22
20
18
16
23
21
19
17
14
12
10
8
15
13
11
9
6
4
2
0
7
5
3
1
6
4
2
0
7
5
3
1
11
15
16
17
18
20
21
22
19
23
1
A23-16
A15-8
A7-0
M7-0
Byte 1
Byte 2
Byte 3
Byte 4
= MSB
*
Figure 14a. Fast Read Dual I/O Instruction (Initial instruction or previous M5-4
≠ 10, SPI Mode only)
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| W25Q32BVSSAP | 32M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25Q32BWSNIP | 4M X 8 SPI BUS SERIAL EEPROM, DSO8 |
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q16V | 制造商:WINBOND 制造商全称:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q16VSFIG | 功能描述:IC FLASH 16MBIT 80MHZ 16SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 产品变化通告:Product Discontinuation 26/Apr/2010 标准包装:136 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步，DDR II 存储容量:18M（1M x 18） 速度:200MHz 接口:并联 电源电压:1.7 V ~ 1.9 V 工作温度:0°C ~ 70°C 封装/外壳:165-TBGA 供应商设备封装:165-CABGA（13x15） 包装:托盘 其它名称:71P71804S200BQ |
| W25Q16VSSIG | 功能描述:IC FLASH 16MBIT 80MHZ 8SOIC RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 产品变化通告:Product Discontinuation 26/Apr/2010 标准包装:136 系列:- 格式 - 存储器:RAM 存储器类型:SRAM - 同步，DDR II 存储容量:18M（1M x 18） 速度:200MHz 接口:并联 电源电压:1.7 V ~ 1.9 V 工作温度:0°C ~ 70°C 封装/外壳:165-TBGA 供应商设备封装:165-CABGA（13x15） 包装:托盘 其它名称:71P71804S200BQ |
| W25Q16VZPIG | 制造商:WINBOND 制造商全称:Winbond 功能描述:16M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q20BW | 制造商:WINBOND 制造商全称:Winbond 功能描述:1.8V 2M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
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